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gpu: nvgpu: modify NVGPU_SUPPORT_COMPRESSION bit
Update NVGPU_SUPPORT_COMPRESSION bit position within GPU characteristics to keep NVGPU_SUPPORT_COMPRESSION flag same as QNX flag. JIRA NVGPU-4666 Change-Id: Iaf3ea49dbb26b3d7385ef426283a36d2f414b25f Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2340989 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
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committed by
Alex Waterman
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8f715117d4
@@ -174,7 +174,7 @@ struct nvgpu_gpu_zbc_query_table_args {
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/* Fault recovery is enabled */
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#define NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY (1ULL << 33)
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/* Compression is enabled */
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#define NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION (1ULL << 34)
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#define NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION (1ULL << 36)
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/* SM LRF ECC is enabled */
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#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
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/* SM SHM ECC is enabled */
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