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gpu: nvgpu: misc MISRA 14.4 fixes

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This fixes a few lingering MISRA Rule 14.4 violations.  Rule 14.4
requires that the condition of an if statement be a boolean.

JIRA NVGPU-1022

Change-Id: Ib6293e00e0436fceee9f7bf0ada1b6ac01a82faa
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975424
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2018-12-17 16:54:50 -05:00
committed by mobile promotions
parent 54e02c01f8
commit 90024cb73a
4 changed files with 8 additions and 8 deletions
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2
drivers/gpu/nvgpu/common/fifo/channel.c
View File

@@ -936,7 +936,7 @@ int channel_gk20a_alloc_job(struct channel_gk20a *c,
*/
nvgpu_smp_rmb();
if (CIRC_SPACE(put, get, c->joblist.pre_alloc.length)) {
if (CIRC_SPACE(put, get, c->joblist.pre_alloc.length) != 0) {
*job_out = &c->joblist.pre_alloc.jobs[put];
} else {
nvgpu_warn(c->g,

4
drivers/gpu/nvgpu/common/fifo/tsg.c
View File

@@ -250,7 +250,7 @@ bool nvgpu_tsg_mark_error(struct gk20a *g,
nvgpu_rwsem_down_read(&tsg->ch_list_lock);
nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
if (gk20a_channel_get(ch)) {
if (gk20a_channel_get(ch) != NULL) {
if (nvgpu_channel_mark_error(g, ch)) {
verbose = true;
}
@@ -272,7 +272,7 @@ void nvgpu_tsg_set_ctx_mmu_error(struct gk20a *g,
nvgpu_rwsem_down_read(&tsg->ch_list_lock);
nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
if (gk20a_channel_get(ch)) {
if (gk20a_channel_get(ch) != NULL) {
nvgpu_channel_set_ctx_mmu_error(g, ch);
gk20a_channel_put(ch);
}

2
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -2215,7 +2215,7 @@ static u32 fifo_error_isr(struct gk20a *g, u32 fifo_intr)
/* pio mode is unused. this shouldn't happen, ever. */
/* should we clear it or just leave it pending? */
nvgpu_err(g, "fifo pio error!");
BUG_ON(1);
BUG();
}
if ((fifo_intr & fifo_intr_0_bind_error_pending_f()) != 0U) {

8
drivers/gpu/nvgpu/os/posix/timers.c
View File

@@ -42,7 +42,7 @@ static bool time_after(s64 a, s64 b)
int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
u32 duration, unsigned long flags)
{
if (flags & ~NVGPU_TIMER_FLAG_MASK)
if ((flags & ~NVGPU_TIMER_FLAG_MASK) != 0U)
return -EINVAL;
(void) memset(timeout, 0, sizeof(*timeout));
@@ -50,7 +50,7 @@ int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
timeout->g = g;
timeout->flags = flags;
if (flags & NVGPU_TIMER_RETRY_TIMER)
if ((flags & NVGPU_TIMER_RETRY_TIMER) != 0U)
timeout->retries.max = duration;
else
timeout->time = nvgpu_current_time_ms() + (s64)duration;
@@ -109,7 +109,7 @@ int __nvgpu_timeout_expired_msg(struct nvgpu_timeout *timeout,
va_list args;
va_start(args, fmt);
if (timeout->flags & NVGPU_TIMER_RETRY_TIMER)
if ((timeout->flags & NVGPU_TIMER_RETRY_TIMER) != 0U)
ret = __nvgpu_timeout_expired_msg_retry(timeout, caller, fmt,
args);
else
@@ -122,7 +122,7 @@ int __nvgpu_timeout_expired_msg(struct nvgpu_timeout *timeout,
int nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
{
if (timeout->flags & NVGPU_TIMER_RETRY_TIMER)
if ((timeout->flags & NVGPU_TIMER_RETRY_TIMER) != 0U)
return timeout->retries.attempted >= timeout->retries.max;
else
return time_after(now(), timeout->time);