gpu: nvgpu: Reorg bus HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the bus
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: If03303c34d91480d41fc29e66069efd43e970d75
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514660
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Sunny He
2017-07-05 19:05:06 -07:00
committed by mobile promotions
parent d717c69d2b
commit 907fcae638
7 changed files with 38 additions and 18 deletions

View File

@@ -129,7 +129,7 @@ int gk20a_read_ptimer(struct gk20a *g, u64 *value)
return -EBUSY;
}
static int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
{
u64 iova = gk20a_mm_inst_block_addr(g, bar1_inst);
u32 ptr_v = (u32)(iova >> bar1_instance_block_shift_gk20a());

View File

@@ -20,11 +20,11 @@
struct gk20a;
struct gpu_ops;
void gk20a_init_bus(struct gpu_ops *gops);
struct nvgpu_mem;
void gk20a_bus_isr(struct gk20a *g);
int gk20a_read_ptimer(struct gk20a *g, u64 *value);
void gk20a_bus_init_hw(struct gk20a *g);
int gk20a_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst);
#endif /* GK20A_H */

View File

@@ -22,7 +22,7 @@
#include <nvgpu/hw/gm20b/hw_bus_gm20b.h>
static int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
{
struct nvgpu_timeout timeout;
int err = 0;
@@ -53,12 +53,3 @@ static int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst)
return err;
}
void gm20b_init_bus(struct gpu_ops *gops)
{
gops->bus.init_hw = gk20a_bus_init_hw;
gops->bus.isr = gk20a_bus_isr;
gops->bus.read_ptimer = gk20a_read_ptimer;
gops->bus.get_timestamps_zipper = nvgpu_get_timestamps_zipper;
gops->bus.bar1_bind = gm20b_bus_bar1_bind;
}

View File

@@ -16,8 +16,9 @@
#ifndef _NVGPU_GM20B_BUS
#define _NVGPU_GM20B_BUS
struct gpu_ops;
struct gk20a;
struct nvgpu_mem;
void gm20b_init_bus(struct gpu_ops *gops);
int gm20b_bus_bar1_bind(struct gk20a *g, struct nvgpu_mem *bar1_inst);
#endif

View File

@@ -36,11 +36,13 @@
#include "regops_gm20b.h"
#include "cde_gm20b.h"
#include "therm_gm20b.h"
#include "bus_gm20b.h"
#include "hal_gm20b.h"
#include <nvgpu/debug.h>
#include <nvgpu/bug.h>
#include <nvgpu/enabled.h>
#include <nvgpu/bus.h>
#include <nvgpu/hw/gm20b/hw_proj_gm20b.h>
#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
@@ -234,6 +236,13 @@ static const struct gpu_ops gm20b_ops = {
.cde = {
.get_program_numbers = gm20b_cde_get_program_numbers,
},
.bus = {
.init_hw = gk20a_bus_init_hw,
.isr = gk20a_bus_isr,
.read_ptimer = gk20a_read_ptimer,
.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
.bar1_bind = gm20b_bus_bar1_bind,
},
#if defined(CONFIG_GK20A_CYCLE_STATS)
.css = {
.enable_snapshot = css_hw_enable_snapshot,
@@ -263,6 +272,7 @@ int gm20b_init_hal(struct gk20a *g)
gops->dbg_session_ops = gm20b_ops.dbg_session_ops;
gops->debug = gm20b_ops.debug;
gops->cde = gm20b_ops.cde;
gops->bus = gm20b_ops.bus;
#if defined(CONFIG_GK20A_CYCLE_STATS)
gops->css = gm20b_ops.css;
#endif
@@ -302,8 +312,8 @@ int gm20b_init_hal(struct gk20a *g)
}
}
#endif
g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
gk20a_init_bus(gops);
gk20a_init_priv_ring(gops);
gm20b_init_gr(gops);
gm20b_init_fb(gops);

View File

@@ -59,6 +59,7 @@
#include <nvgpu/debug.h>
#include <nvgpu/bug.h>
#include <nvgpu/bus.h>
#include <nvgpu/hw/gp106/hw_proj_gp106.h>
@@ -278,6 +279,13 @@ static const struct gpu_ops gp106_ops = {
.need_scatter_buffer = gp10b_need_scatter_buffer,
.populate_scatter_buffer = gp10b_populate_scatter_buffer,
},
.bus = {
.init_hw = gk20a_bus_init_hw,
.isr = gk20a_bus_isr,
.read_ptimer = gk20a_read_ptimer,
.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
.bar1_bind = gk20a_bus_bar1_bind,
},
#if defined(CONFIG_GK20A_CYCLE_STATS)
.css = {
.enable_snapshot = css_hw_enable_snapshot,
@@ -324,6 +332,7 @@ int gp106_init_hal(struct gk20a *g)
gops->debug = gp106_ops.debug;
gops->dbg_session_ops = gp106_ops.dbg_session_ops;
gops->cde = gp106_ops.cde;
gops->bus = gp106_ops.bus;
#if defined(CONFIG_GK20A_CYCLE_STATS)
gops->css = gp106_ops.css;
#endif
@@ -339,8 +348,8 @@ int gp106_init_hal(struct gk20a *g)
gops->privsecurity = 1;
gops->securegpccs = 1;
gops->pmupstate = true;
g->bootstrap_owner = LSF_FALCON_ID_SEC2;
gk20a_init_bus(gops);
gp10b_init_priv_ring(gops);
gp106_init_gr(gops);
gp10b_init_fecs_trace_ops(gops);

View File

@@ -50,6 +50,7 @@
#include <nvgpu/debug.h>
#include <nvgpu/bug.h>
#include <nvgpu/enabled.h>
#include <nvgpu/bus.h>
#include <nvgpu/hw/gp10b/hw_proj_gp10b.h>
#include <nvgpu/hw/gp10b/hw_fuse_gp10b.h>
@@ -245,6 +246,13 @@ static const struct gpu_ops gp10b_ops = {
.need_scatter_buffer = gp10b_need_scatter_buffer,
.populate_scatter_buffer = gp10b_populate_scatter_buffer,
},
.bus = {
.init_hw = gk20a_bus_init_hw,
.isr = gk20a_bus_isr,
.read_ptimer = gk20a_read_ptimer,
.get_timestamps_zipper = nvgpu_get_timestamps_zipper,
.bar1_bind = gk20a_bus_bar1_bind,
},
#if defined(CONFIG_GK20A_CYCLE_STATS)
.css = {
.enable_snapshot = css_hw_enable_snapshot,
@@ -274,6 +282,7 @@ int gp10b_init_hal(struct gk20a *g)
gops->debug = gp10b_ops.debug;
gops->dbg_session_ops = gp10b_ops.dbg_session_ops;
gops->cde = gp10b_ops.cde;
gops->bus = gp10b_ops.bus;
#if defined(CONFIG_GK20A_CYCLE_STATS)
gops->css = gp10b_ops.css;
#endif
@@ -321,8 +330,8 @@ int gp10b_init_hal(struct gk20a *g)
}
}
#endif
g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT;
gk20a_init_bus(gops);
gp10b_init_priv_ring(gops);
gp10b_init_gr(gops);
gp10b_init_fecs_trace_ops(gops);