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gpu: nvgpu: Increase PBDMA timeout
PBDMA timeout can cause stale data in FIFO. Default value equals 1ms. Increase it to max. Bug 1537636 Change-Id: I1c6c6b10abaece3a64b77b9b3ef77ff726ff67cf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/457047 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Chang <allchang@nvidia.com> Tested-by: Allen Chang <allchang@nvidia.com>
This commit is contained in:
committed by
Dan Willemsen
parent
62e80a189c
commit
92c9a2d06e
@@ -423,6 +423,13 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
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fifo_fb_timeout_period_max_f());
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gk20a_writel(g, fifo_fb_timeout_r(), timeout);
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for (i = 0; i < pbdma_timeout__size_1_v(); i++) {
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timeout = gk20a_readl(g, pbdma_timeout_r(i));
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timeout = set_field(timeout, pbdma_timeout_period_m(),
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pbdma_timeout_period_max_f());
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gk20a_writel(g, pbdma_timeout_r(i), timeout);
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}
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if (tegra_platform_is_silicon()) {
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timeout = gk20a_readl(g, fifo_pb_timeout_r());
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timeout &= ~fifo_pb_timeout_detection_enabled_f();
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@@ -106,6 +106,22 @@ static inline u32 pbdma_gp_put_r(u32 i)
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{
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return 0x00040000 + i*8192;
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}
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static inline u32 pbdma_timeout_r(u32 i)
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{
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return 0x0004012c + i*8192;
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}
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static inline u32 pbdma_timeout__size_1_v(void)
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{
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return 0x00000001;
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}
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static inline u32 pbdma_timeout_period_m(void)
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{
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return 0xffffffff << 0;
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}
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static inline u32 pbdma_timeout_period_max_f(void)
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{
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return 0xffffffff;
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}
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static inline u32 pbdma_pb_fetch_r(u32 i)
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{
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return 0x00040054 + i*8192;
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