nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: rename redundant runlist names in HAL

Browse Source 
Drop the "runlist_" part in the runlist section of the HAL ops. For
example:

- old: g->ops.runlist.runlist_wait_pending
- new: g->ops.runlist.wait_pending

At the same time, drop the "fifo_" part from the function names. For
example:

- old: gk20a_fifo_runlist_wait_pending
- new: gk20a_runlist_wait_pending

Also rename eng_runlist_base_size to count_max. The size of the
eng_runlist_base register array depicts the maximum possible number of
runlists in the chip for which count_max is more descriptive.

Jira NVGPU-1309

Change-Id: Ie9e94b9f65cd10d3e682d19954f240adb6e311be
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2017403
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Holtta
2019-02-12 15:44:36 +02:00
committed by mobile promotions
parent ac24a33a76
commit 93e15f9c43
25 changed files with 125 additions and 129 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
userspace/units/fifo/runlist/nvgpu-runlist.c
View File

@@ -60,8 +60,8 @@ static void setup_fifo(struct gk20a *g, unsigned long *tsg_map,
* entries are enough. The logic is same across chips.
*/
f->runlist_entry_size = 2 * sizeof(u32);
g->ops.runlist.get_tsg_runlist_entry = gk20a_get_tsg_runlist_entry;
g->ops.runlist.get_ch_runlist_entry = gk20a_get_ch_runlist_entry;
g->ops.runlist.get_tsg_entry = gk20a_runlist_get_tsg_entry;
g->ops.runlist.get_ch_entry = gk20a_runlist_get_ch_entry;
g->runlist_interleave = interleave;