gpu: nvgpu: checks in nvgpu_engine_init_info

Return error in nvgpu_engine_init_info if g->ops.top.get_device_info
is NULL. In particular, do not attempt to init CE info.

Jira NVGPU-3693

Change-Id: I521cb43233a48b6e765ffd0b1feee81a30dbd739
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2242699
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-11-19 11:09:01 -05:00
committed by Alex Waterman
parent 95c3e56961
commit 945e9ebee2

View File

@@ -806,58 +806,59 @@ int nvgpu_engine_init_info(struct nvgpu_fifo *f)
enum nvgpu_fifo_engine engine_enum;
u32 pbdma_id = U32_MAX;
bool found_pbdma_for_runlist = false;
struct nvgpu_device_info dev_info;
struct nvgpu_engine_info *info;
f->num_engines = 0;
if (g->ops.top.get_device_info != NULL) {
struct nvgpu_device_info dev_info;
struct nvgpu_engine_info *info;
ret = g->ops.top.get_device_info(g, &dev_info,
NVGPU_ENGINE_GRAPHICS, 0);
if (ret != 0) {
nvgpu_err(g,
"Failed to parse dev_info table for engine %d",
NVGPU_ENGINE_GRAPHICS);
return -EINVAL;
}
found_pbdma_for_runlist = g->ops.pbdma.find_for_runlist(g,
dev_info.runlist_id,
&pbdma_id);
if (!found_pbdma_for_runlist) {
nvgpu_err(g, "busted pbdma map");
return -EINVAL;
}
engine_enum = nvgpu_engine_enum_from_type(g,
dev_info.engine_type);
info = &g->fifo.engine_info[dev_info.engine_id];
info->intr_mask |= BIT32(dev_info.intr_id);
info->reset_mask |= BIT32(dev_info.reset_id);
info->runlist_id = dev_info.runlist_id;
info->pbdma_id = pbdma_id;
info->inst_id = dev_info.inst_id;
info->pri_base = dev_info.pri_base;
info->engine_enum = engine_enum;
info->fault_id = dev_info.fault_id;
/* engine_id starts from 0 to NV_HOST_NUM_ENGINES */
f->active_engines_list[f->num_engines] = dev_info.engine_id;
++f->num_engines;
nvgpu_log_info(g,
"gr info: engine_id %d runlist_id %d intr_id %d "
"reset_id %d engine_type %d engine_enum %d inst_id %d",
dev_info.engine_id,
dev_info.runlist_id,
dev_info.intr_id,
dev_info.reset_id,
dev_info.engine_type,
engine_enum,
dev_info.inst_id);
if (g->ops.top.get_device_info == NULL) {
nvgpu_err(g, "unable to parse dev_info table");
return -EINVAL;
}
ret = g->ops.top.get_device_info(g, &dev_info,
NVGPU_ENGINE_GRAPHICS, 0);
if (ret != 0) {
nvgpu_err(g,
"Failed to parse dev_info table for engine %d",
NVGPU_ENGINE_GRAPHICS);
return -EINVAL;
}
found_pbdma_for_runlist = g->ops.pbdma.find_for_runlist(g,
dev_info.runlist_id,
&pbdma_id);
if (!found_pbdma_for_runlist) {
nvgpu_err(g, "busted pbdma map");
return -EINVAL;
}
engine_enum = nvgpu_engine_enum_from_type(g, dev_info.engine_type);
info = &g->fifo.engine_info[dev_info.engine_id];
info->intr_mask |= BIT32(dev_info.intr_id);
info->reset_mask |= BIT32(dev_info.reset_id);
info->runlist_id = dev_info.runlist_id;
info->pbdma_id = pbdma_id;
info->inst_id = dev_info.inst_id;
info->pri_base = dev_info.pri_base;
info->engine_enum = engine_enum;
info->fault_id = dev_info.fault_id;
/* engine_id starts from 0 to NV_HOST_NUM_ENGINES */
f->active_engines_list[f->num_engines] = dev_info.engine_id;
++f->num_engines;
nvgpu_log_info(g,
"gr info: engine_id %d runlist_id %d intr_id %d "
"reset_id %d engine_type %d engine_enum %d inst_id %d",
dev_info.engine_id,
dev_info.runlist_id,
dev_info.intr_id,
dev_info.reset_id,
dev_info.engine_type,
engine_enum,
dev_info.inst_id);
ret = g->ops.engine.init_ce_info(f);
return ret;