gpu: nvgpu: add debugfs to dump clocks

It attaches the neccesary namemap structures to the clock struct so we can enumerate the clock domains in the debugfs code in nvgpu-t18x.
the other is to add an accessor for the fields.

JIRA DNVGPU-98

Change-Id: I6e5c6e763b2b88daa1995f4136a9a7b33ea25b17
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1199083
Reviewed-on: http://git-master/r/1204016
(cherry picked from commit b9d95a45791b93ddc010d1aeddbe798d2a9705d4)
Reviewed-on: http://git-master/r/1227910
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
David Nieto
2016-08-08 03:17:28 -07:00
committed by mobile promotions
parent 098fb0d4dd
commit 965c2cbbec
2 changed files with 9 additions and 0 deletions

View File

@@ -74,12 +74,16 @@ struct pll_parms {
u32 iddq_exit_delay;
};
struct namemap_cfg;
struct clk_gk20a {
struct gk20a *g;
struct clk *tegra_clk;
struct pll gpc_pll;
struct pll gpc_pll_last;
struct mutex clk_mutex;
struct namemap_cfg *clk_namemap;
u32 namemap_num;
bool sw_ready;
bool clk_hw_on;
bool debugfs_set;

View File

@@ -1116,6 +1116,11 @@ static inline u32 set_field(u32 val, u32 mask, u32 field)
return ((val & ~mask) | field);
}
static inline u32 get_field(u32 reg, u32 mask)
{
return (reg & mask);
}
/* invalidate channel lookup tlb */
static inline void gk20a_gr_flush_channel_tlb(struct gr_gk20a *gr)
{