gpu: nvgpu: add gops_gin HAL

Add a gops_gin struct for handling chip-specific GIN functionality. For
now, it only has the get_intr_ctrl_msg HAL. Each per-unit INTR_CTRL
register holds an opaque 32-bit value that determines how an interrupt
is routed. The layout of this value is determined by GIN. This HAL
allows units to ask GIN how it should program their INTR_CTRL registers.

Jira NVGPU-9217

Change-Id: I18f86e09701634bdb39db6b6e4728cd3595caa02
Signed-off-by: Austin Tajiri <atajiri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2839755
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>

arch/nvgpu-common.yaml

@@ -1,4 +1,4 @@
-# Copyright (c) 2019-2022, NVIDIA CORPORATION.  All Rights Reserved.
+# Copyright (c) 2019-2023, NVIDIA CORPORATION.  All Rights Reserved.
 #
 # Common elements and units in nvgpu.
 #
@@ -1167,6 +1167,12 @@ cic:
              common/cic/rm/cic_rm_priv.h,
              include/nvgpu/cic_rm.h ]
 
+gin:
+  owner: Austin T
+  safe: no
+  sources: [ include/nvgpu/gops/gin.h,
+             include/nvgpu/gin.h ]
+
 ##
 ## HAL units. Currently they are under common but this needs to change.
 ## We are moving these to a top level directory.

drivers/gpu/nvgpu/include/nvgpu/gin.h

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2023, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef NVGPU_GIN_H
+#define NVGPU_GIN_H
+
+/**
+ * Value to be passed to gin.get_intr_ctrl_msg to enable routing the interrupt
+ * to the CPU.
+ */
+#define NVGPU_GIN_CPU_ENABLE		true
+
+/**
+ * Value to be passed to gin.get_intr_ctrl_msg to disable routing the interrupt
+ * to the CPU.
+ */
+#define NVGPU_GIN_CPU_DISABLE		false
+
+/**
+ * Value to be passed to gin.get_intr_ctrl_msg to enable routing the interrupt
+ * to the GSP.
+ */
+#define NVGPU_GIN_GSP_ENABLE		true
+
+/**
+ * Value to be passed to gin.get_intr_ctrl_msg to disable routing the interrupt
+ * to the GSP.
+ */
+#define NVGPU_GIN_GSP_DISABLE		false
+
+#endif /* NVGPU_GIN_H */

drivers/gpu/nvgpu/include/nvgpu/gops/gin.h

@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2023, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+#ifndef NVGPU_GOPS_GIN_H
+#define NVGPU_GOPS_GIN_H
+
+#include <nvgpu/types.h>
+
+/**
+ * @file
+ *
+ * GIN HAL interface.
+ */
+struct gk20a;
+
+/**
+ * GIN HAL operations.
+ *
+ * @see gpu_ops.
+ */
+struct gops_gin {
+	u32 (*get_intr_ctrl_msg)(struct gk20a *g, u32 vector,
+		bool cpu_enable, bool gsp_enable);
+};
+
+#endif

drivers/gpu/nvgpu/include/nvgpu/gpu_ops.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2022, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2020-2023, NVIDIA CORPORATION.  All rights reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -71,6 +71,7 @@
 #include <nvgpu/gops/ecc.h>
 #include <nvgpu/gops/grmgr.h>
 #include <nvgpu/gops/cic_mon.h>
+#include <nvgpu/gops/gin.h>
 #ifdef CONFIG_NVGPU_NON_FUSA
 #include <nvgpu/gops/mssnvlink.h>
 #endif
@@ -272,6 +273,8 @@ struct gpu_ops {
 
 	struct gops_cic_mon cic_mon;
 
+	struct gops_gin gin;
+
 /** @cond DOXYGEN_SHOULD_SKIP_THIS */
 #ifdef CONFIG_NVGPU_NON_FUSA
 	struct gops_mssnvlink mssnvlink;