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gpu: nvgpu: Enumerate priv ring before intr enable

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Mon subelement needs to access GPC TPC configuration registers
to figure out GPC/TPC count post floor sweeping. These registers
are needed as part of intr handling.
Move priv ring init ahead in RM boot to make sure priv ring
enumeration is done before any unit enables it's interrupts.
This ensures that priv ring is enumerated before any interrupt
handler is run to access GPC/TPC count.

JIRA NVGPU-6528

Change-Id: I8aa6ac182e6dd60a79fa76af6813ea70102316f4
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2809442
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Tejal Kudav
2022-11-15 10:14:36 +00:00
committed by mobile promotions
parent a687c78077
commit 9865db4e46
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/nvgpu/common/init/nvgpu_init.c
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@@ -738,7 +738,6 @@ static int nvgpu_early_init(struct gk20a *g)
NVGPU_INIT_TABLE_ENTRY(g->ops.bios.bios_sw_init, NO_FLAG),
#endif
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_interrupt_setup, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.bus.init_hw, NO_FLAG),
#ifdef CONFIG_NVGPU_STATIC_POWERGATE
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_power_gate, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_acquire_static_pg_lock, NO_FLAG),
@@ -746,6 +745,7 @@ static int nvgpu_early_init(struct gk20a *g)
#endif
NVGPU_INIT_TABLE_ENTRY(g->ops.priv_ring.enable_priv_ring,
NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.bus.init_hw, NO_FLAG),
#ifdef CONFIG_NVGPU_NON_FUSA
NVGPU_INIT_TABLE_ENTRY(&nvgpu_ptimer_init, NO_FLAG),
#endif