gpu: nvgpu: Add ELPG protected call for GR and CE intr

- Accessing any PGRAPH registers in GR intr retrigger
  ISR routine when ELPG is engaged causes idle snap.
- This idle snap is caught when nvgpu_submit_illegal_class
  test is run.
- To avoid access to PGRAPH registers when ELPG is engaged
  add elpg protected call for GR intr retrigger and CE ISR
  and retrigger HALs

Bug 200777033

Change-Id: Ieef4a423faf79f09476d696c3078b113750548bb
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2586449
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2021-08-14 22:39:12 +05:30
committed by mobile promotions
parent e3dd17a287
commit 9984b59a00
4 changed files with 30 additions and 5 deletions

View File

@@ -475,7 +475,7 @@ struct gops_gr_intr {
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
void (*retrigger)(struct gk20a *g);
int (*retrigger)(struct gk20a *g);
u32 (*enable_mask)(struct gk20a *g);
#endif
int (*handle_fecs_error)(struct gk20a *g,