gpu: nvgpu: ACR interface update

- ACR interface update to support
 next GPU chip ACR boot
- Udpate falcon ID

JIRA DNVGPU-34

Change-Id: Ic9e5e1f9bd965dbb65b4feaadcf63e457b49263b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1161695
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2016-06-09 15:47:00 +05:30
committed by Terje Bergstrom
parent b5f2cff023
commit 9b1bb51cf0
2 changed files with 10 additions and 2 deletions

View File

@@ -17,6 +17,9 @@
#include "gm20b/mm_gm20b.h"
#include "gm20b/acr_gm20b.h"
#include "gm206/acr_gm206.h"
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
#include "acr_t18x.h"
#endif
struct acr_desc {
struct mem_desc ucode_blob;
@@ -26,7 +29,12 @@ struct acr_desc {
struct acr_fw_header *fw_hdr;
u32 pmu_args;
const struct firmware *acr_fw;
struct flcn_acr_desc *acr_dmem_desc;
union{
struct flcn_acr_desc *acr_dmem_desc;
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
struct flcn_acr_desc_v1 *acr_dmem_desc_v1;
#endif
};
struct mem_desc acr_ucode;
const struct firmware *hsbl_fw;
struct mem_desc hsbl_ucode;

View File

@@ -55,7 +55,7 @@
#define LSF_FALCON_ID_RESERVED (1)
#define LSF_FALCON_ID_FECS (2)
#define LSF_FALCON_ID_GPCCS (3)
#define LSF_FALCON_ID_END (4)
#define LSF_FALCON_ID_END (11)
#define LSF_FALCON_ID_INVALID (0xFFFFFFFF)
/*!