gpu: nvgpu: make cbc alloc os specific

CBC base needs to be aligned to 64KB. On Linux this is
achieved making compbit backing size multiple of 64KB.
However QNX nvmap alloc function does not allocate
memory aligned to requested size and needs to overallocate
to satisfy alignment requirement. Make cbc alloc function OS
specific to be able to modify QNX code.

Also align cbc base address to 64KB before writing to CBC BASE
register.

Bug 200426427

Change-Id: Ic867501403f2e2a4ba41ad5a8ed6f9c5c8ffa3f4
Signed-off-by: Aparna Das <aparnad@nvidia.com>
(cherry picked from commit 3f1e1133a46ebfc9763c649d7b839d069cae5a36)
Reviewed-on: https://git-master.nvidia.com/r/1786046
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Aparna Das
2018-07-25 17:43:32 -07:00
committed by mobile promotions
parent 0a0ad7e675
commit 9c13b30a46
5 changed files with 55 additions and 18 deletions

View File

@@ -69,7 +69,8 @@ nvgpu-y += \
os/linux/os_sched.o \
os/linux/nvlink.o \
os/linux/dt.o \
os/linux/ecc_sysfs.o
os/linux/ecc_sysfs.o \
os/linux/ltc.o
nvgpu-$(CONFIG_GK20A_VIDMEM) += \
os/linux/dmabuf_vidmem.o

View File

@@ -102,6 +102,8 @@ void gv11b_fb_init_cbc(struct gk20a *g, struct gr_gk20a *gr)
else
compbit_store_iova = nvgpu_mem_get_addr(g,
&gr->compbit_store.mem);
/* must be aligned to 64 KB */
compbit_store_iova = roundup(compbit_store_iova, (u64)SZ_64K);
compbit_base_post_divide64 = compbit_store_iova >>
fb_mmu_cbc_base_address_alignment_shift_v();

View File

@@ -52,20 +52,3 @@ void nvgpu_ltc_sync_enabled(struct gk20a *g)
}
nvgpu_spinlock_release(&g->ltc_enabled_lock);
}
int nvgpu_ltc_alloc_cbc(struct gk20a *g, size_t compbit_backing_size)
{
struct gr_gk20a *gr = &g->gr;
unsigned long flags = 0;
if (nvgpu_mem_is_valid(&gr->compbit_store.mem))
return 0;
if (!nvgpu_iommuable(g))
flags = NVGPU_DMA_FORCE_CONTIGUOUS;
return nvgpu_dma_alloc_flags_sys(g,
flags,
compbit_backing_size,
&gr->compbit_store.mem);
}

View File

@@ -26,6 +26,7 @@
*/
#include <nvgpu/ecc.h>
#include <nvgpu/ltc.h>
#include "gk20a/dbg_gpu_gk20a.h"
@@ -41,3 +42,8 @@ int nvgpu_ecc_sysfs_init(struct gk20a *g)
void nvgpu_ecc_sysfs_remove(struct gk20a *g)
{
}
int nvgpu_ltc_alloc_cbc(struct gk20a *g, size_t compbit_backing_size)
{
return 0;
}

View File

@@ -0,0 +1,45 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/ltc.h>
#include <nvgpu/dma.h>
#include <nvgpu/nvgpu_mem.h>
#include "gk20a/gk20a.h"
#include "gk20a/gr_gk20a.h"
int nvgpu_ltc_alloc_cbc(struct gk20a *g, size_t compbit_backing_size)
{
struct gr_gk20a *gr = &g->gr;
unsigned long flags = 0;
if (nvgpu_mem_is_valid(&gr->compbit_store.mem))
return 0;
if (!nvgpu_iommuable(g))
flags = NVGPU_DMA_FORCE_CONTIGUOUS;
return nvgpu_dma_alloc_flags_sys(g,
flags,
compbit_backing_size,
&gr->compbit_store.mem);
}