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gpu: nvgpu: Add HALs for mmu_fault setup and info
Add below HALs to setup mmu_fault configuration registers and to read information registers and set them on Volta gops.fb.write_mmu_fault_buffer_lo_hi() gops.fb.write_mmu_fault_buffer_get() gops.fb.write_mmu_fault_buffer_size() gops.fb.write_mmu_fault_status() gops.fb.read_mmu_fault_buffer_get() gops.fb.read_mmu_fault_buffer_put() gops.fb.read_mmu_fault_buffer_size() gops.fb.read_mmu_fault_addr_lo_hi() gops.fb.read_mmu_fault_inst_lo_hi() gops.fb.read_mmu_fault_info() gops.fb.read_mmu_fault_status() Jira NVGPUT-13 Change-Id: Ia99568ff905ada3c035efb4565613576012f5bef Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1744063 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
committed by
Tejal Kudav
Tejal Kudav
parent
4e66f214fc
commit
9c5bcbe6f2
@@ -528,6 +528,22 @@ struct gpu_ops {
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unsigned int intr_type);
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int (*init_fbpa)(struct gk20a *g);
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void (*fbpa_isr)(struct gk20a *g);
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void (*write_mmu_fault_buffer_lo_hi)(struct gk20a *g, u32 index,
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u32 addr_lo, u32 addr_hi);
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void (*write_mmu_fault_buffer_get)(struct gk20a *g, u32 index,
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u32 reg_val);
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void (*write_mmu_fault_buffer_size)(struct gk20a *g, u32 index,
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u32 reg_val);
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void (*write_mmu_fault_status)(struct gk20a *g, u32 reg_val);
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u32 (*read_mmu_fault_buffer_get)(struct gk20a *g, u32 index);
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u32 (*read_mmu_fault_buffer_put)(struct gk20a *g, u32 index);
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u32 (*read_mmu_fault_buffer_size)(struct gk20a *g, u32 index);
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void (*read_mmu_fault_addr_lo_hi)(struct gk20a *g,
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u32 *addr_lo, u32 *addr_hi);
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void (*read_mmu_fault_inst_lo_hi)(struct gk20a *g,
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u32 *inst_lo, u32 *inst_hi);
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u32 (*read_mmu_fault_info)(struct gk20a *g);
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u32 (*read_mmu_fault_status)(struct gk20a *g);
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} fb;
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struct {
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void (*slcg_bus_load_gating_prod)(struct gk20a *g, bool prod);
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@@ -473,6 +473,23 @@ static const struct gpu_ops gv100_ops = {
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.enable_nvlink = gv100_fb_enable_nvlink,
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.enable_hub_intr = gv11b_fb_enable_hub_intr,
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.disable_hub_intr = gv11b_fb_disable_hub_intr,
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.write_mmu_fault_buffer_lo_hi =
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fb_gv11b_write_mmu_fault_buffer_lo_hi,
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.write_mmu_fault_buffer_get =
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fb_gv11b_write_mmu_fault_buffer_get,
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.write_mmu_fault_buffer_size =
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fb_gv11b_write_mmu_fault_buffer_size,
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.write_mmu_fault_status = fb_gv11b_write_mmu_fault_status,
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.read_mmu_fault_buffer_get =
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fb_gv11b_read_mmu_fault_buffer_get,
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.read_mmu_fault_buffer_put =
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fb_gv11b_read_mmu_fault_buffer_put,
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.read_mmu_fault_buffer_size =
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fb_gv11b_read_mmu_fault_buffer_size,
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.read_mmu_fault_addr_lo_hi = fb_gv11b_read_mmu_fault_addr_lo_hi,
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.read_mmu_fault_inst_lo_hi = fb_gv11b_read_mmu_fault_inst_lo_hi,
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.read_mmu_fault_info = fb_gv11b_read_mmu_fault_info,
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.read_mmu_fault_status = fb_gv11b_read_mmu_fault_status,
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},
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.clock_gating = {
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.slcg_bus_load_gating_prod =
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@@ -231,7 +231,7 @@ u32 gv11b_fb_is_fault_buf_enabled(struct gk20a *g,
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{
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u32 reg_val;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_size_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_size(g, index);
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return fb_mmu_fault_buffer_size_enable_v(reg_val);
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}
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@@ -242,7 +242,7 @@ static void gv11b_fb_fault_buffer_get_ptr_update(struct gk20a *g,
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nvgpu_log(g, gpu_dbg_intr, "updating get index with = %d", next);
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_get_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_get(g, index);
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reg_val = set_field(reg_val, fb_mmu_fault_buffer_get_ptr_m(),
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fb_mmu_fault_buffer_get_ptr_f(next));
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@@ -252,7 +252,7 @@ static void gv11b_fb_fault_buffer_get_ptr_update(struct gk20a *g,
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if (reg_val & fb_mmu_fault_buffer_get_overflow_m())
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reg_val |= fb_mmu_fault_buffer_get_overflow_clear_f();
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gk20a_writel(g, fb_mmu_fault_buffer_get_r(index), reg_val);
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g->ops.fb.write_mmu_fault_buffer_get(g, index, reg_val);
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/* make sure get ptr update is visible to everyone to avoid
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* reading already read entry
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@@ -265,7 +265,7 @@ static u32 gv11b_fb_fault_buffer_get_index(struct gk20a *g,
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{
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u32 reg_val;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_get_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_get(g, index);
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return fb_mmu_fault_buffer_get_ptr_v(reg_val);
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}
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@@ -274,7 +274,7 @@ static u32 gv11b_fb_fault_buffer_put_index(struct gk20a *g,
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{
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u32 reg_val;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_put_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_put(g, index);
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return fb_mmu_fault_buffer_put_ptr_v(reg_val);
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}
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@@ -283,7 +283,7 @@ static u32 gv11b_fb_fault_buffer_size_val(struct gk20a *g,
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{
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u32 reg_val;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_size_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_size(g, index);
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return fb_mmu_fault_buffer_size_val_v(reg_val);
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}
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@@ -321,14 +321,14 @@ void gv11b_fb_fault_buf_set_state_hw(struct gk20a *g,
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nvgpu_log_fn(g, " ");
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_size_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_size(g, index);
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if (state) {
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if (gv11b_fb_is_fault_buf_enabled(g, index)) {
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nvgpu_log_info(g, "fault buffer is already enabled");
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} else {
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reg_val |= fb_mmu_fault_buffer_size_enable_true_f();
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gk20a_writel(g, fb_mmu_fault_buffer_size_r(index),
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reg_val);
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g->ops.fb.write_mmu_fault_buffer_size(g, index,
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reg_val);
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}
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} else {
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@@ -339,9 +339,9 @@ void gv11b_fb_fault_buf_set_state_hw(struct gk20a *g,
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NVGPU_TIMER_CPU_TIMER);
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reg_val &= (~(fb_mmu_fault_buffer_size_enable_m()));
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gk20a_writel(g, fb_mmu_fault_buffer_size_r(index), reg_val);
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g->ops.fb.write_mmu_fault_buffer_size(g, index, reg_val);
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fault_status = gk20a_readl(g, fb_mmu_fault_status_r());
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fault_status = g->ops.fb.read_mmu_fault_status(g);
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do {
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if (!(fault_status & fb_mmu_fault_status_busy_true_f()))
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@@ -352,7 +352,7 @@ void gv11b_fb_fault_buf_set_state_hw(struct gk20a *g,
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* during the window BAR2 is being unmapped by s/w
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*/
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nvgpu_log_info(g, "fault status busy set, check again");
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fault_status = gk20a_readl(g, fb_mmu_fault_status_r());
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fault_status = g->ops.fb.read_mmu_fault_status(g);
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nvgpu_usleep_range(delay, delay * 2);
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delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX);
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@@ -374,13 +374,11 @@ void gv11b_fb_fault_buf_configure_hw(struct gk20a *g, unsigned int index)
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ram_in_base_shift_v());
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addr_hi = u64_hi32(g->mm.hw_fault_buf[index].gpu_va);
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gk20a_writel(g, fb_mmu_fault_buffer_lo_r(index),
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fb_mmu_fault_buffer_lo_addr_f(addr_lo));
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g->ops.fb.write_mmu_fault_buffer_lo_hi(g, index,
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fb_mmu_fault_buffer_lo_addr_f(addr_lo),
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fb_mmu_fault_buffer_hi_addr_f(addr_hi));
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gk20a_writel(g, fb_mmu_fault_buffer_hi_r(index),
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fb_mmu_fault_buffer_hi_addr_f(addr_hi));
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gk20a_writel(g, fb_mmu_fault_buffer_size_r(index),
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g->ops.fb.write_mmu_fault_buffer_size(g, index,
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fb_mmu_fault_buffer_size_val_f(g->ops.fifo.get_num_fifos(g)) |
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fb_mmu_fault_buffer_size_overflow_intr_enable_f());
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@@ -1083,11 +1081,11 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
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return;
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}
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reg_val = gk20a_readl(g, fb_mmu_fault_inst_lo_r());
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g->ops.fb.read_mmu_fault_inst_lo_hi(g, ®_val, &addr_hi);
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addr_lo = fb_mmu_fault_inst_lo_addr_v(reg_val);
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addr_lo = addr_lo << ram_in_base_shift_v();
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addr_hi = gk20a_readl(g, fb_mmu_fault_inst_hi_r());
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addr_hi = fb_mmu_fault_inst_hi_addr_v(addr_hi);
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inst_ptr = hi32_lo32_to_u64(addr_hi, addr_lo);
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@@ -1107,18 +1105,18 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
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&mmfault->faulted_engine, &mmfault->faulted_subid,
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&mmfault->faulted_pbdma);
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reg_val = gk20a_readl(g, fb_mmu_fault_addr_lo_r());
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g->ops.fb.read_mmu_fault_addr_lo_hi(g, ®_val, &addr_hi);
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addr_lo = fb_mmu_fault_addr_lo_addr_v(reg_val);
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addr_lo = addr_lo << ram_in_base_shift_v();
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mmfault->fault_addr_aperture =
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fb_mmu_fault_addr_lo_phys_aperture_v(reg_val);
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addr_hi = gk20a_readl(g, fb_mmu_fault_addr_hi_r());
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addr_hi = fb_mmu_fault_addr_hi_addr_v(addr_hi);
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mmfault->fault_addr = hi32_lo32_to_u64(addr_hi, addr_lo);
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reg_val = gk20a_readl(g, fb_mmu_fault_info_r());
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reg_val = g->ops.fb.read_mmu_fault_info(g);
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mmfault->fault_type = fb_mmu_fault_info_fault_type_v(reg_val);
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mmfault->replayable_fault =
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fb_mmu_fault_info_replayable_fault_v(reg_val);
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@@ -1134,7 +1132,7 @@ static void gv11b_mm_copy_from_fault_snap_reg(struct gk20a *g,
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mmfault->valid = fb_mmu_fault_info_valid_v(reg_val);
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fault_status &= ~(fb_mmu_fault_status_valid_m());
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gk20a_writel(g, fb_mmu_fault_status_r(), fault_status);
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g->ops.fb.write_mmu_fault_status(g, fault_status);
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gv11b_fb_parse_mmfault(mmfault);
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@@ -1146,7 +1144,7 @@ void gv11b_fb_handle_replay_fault_overflow(struct gk20a *g,
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u32 reg_val;
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unsigned int index = REPLAY_REG_INDEX;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_get_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_get(g, index);
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if (fault_status &
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fb_mmu_fault_status_replayable_getptr_corrupted_m()) {
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@@ -1172,7 +1170,7 @@ void gv11b_fb_handle_replay_fault_overflow(struct gk20a *g,
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fb_mmu_fault_buffer_get_overflow_clear_f());
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}
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gk20a_writel(g, fb_mmu_fault_buffer_get_r(index), reg_val);
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g->ops.fb.write_mmu_fault_buffer_get(g, index, reg_val);
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}
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void gv11b_fb_handle_nonreplay_fault_overflow(struct gk20a *g,
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@@ -1181,7 +1179,7 @@ void gv11b_fb_handle_nonreplay_fault_overflow(struct gk20a *g,
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u32 reg_val;
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unsigned int index = NONREPLAY_REG_INDEX;
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reg_val = gk20a_readl(g, fb_mmu_fault_buffer_get_r(index));
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reg_val = g->ops.fb.read_mmu_fault_buffer_get(g, index);
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if (fault_status &
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fb_mmu_fault_status_non_replayable_getptr_corrupted_m()) {
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@@ -1208,7 +1206,7 @@ void gv11b_fb_handle_nonreplay_fault_overflow(struct gk20a *g,
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fb_mmu_fault_buffer_get_overflow_clear_f());
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}
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gk20a_writel(g, fb_mmu_fault_buffer_get_r(index), reg_val);
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g->ops.fb.write_mmu_fault_buffer_get(g, index, reg_val);
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}
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static void gv11b_fb_handle_bar2_fault(struct gk20a *g,
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@@ -1285,7 +1283,7 @@ void gv11b_fb_handle_dropped_mmu_fault(struct gk20a *g, u32 fault_status)
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if (fault_status & dropped_faults) {
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nvgpu_err(g, "dropped mmu fault (0x%08x)",
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fault_status & dropped_faults);
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gk20a_writel(g, fb_mmu_fault_status_r(), dropped_faults);
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g->ops.fb.write_mmu_fault_status(g, dropped_faults);
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}
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}
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@@ -1304,7 +1302,7 @@ void gv11b_fb_handle_replayable_mmu_fault(struct gk20a *g)
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static void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
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{
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u32 fault_status = gk20a_readl(g, fb_mmu_fault_status_r());
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u32 fault_status = g->ops.fb.read_mmu_fault_status(g);
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nvgpu_log(g, gpu_dbg_intr, "mmu_fault_status = 0x%08x", fault_status);
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@@ -1357,8 +1355,8 @@ static void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
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}
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nvgpu_log(g, gpu_dbg_intr, "clear mmu fault status");
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gk20a_writel(g, fb_mmu_fault_status_r(),
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fb_mmu_fault_status_valid_clear_f());
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g->ops.fb.write_mmu_fault_status(g,
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fb_mmu_fault_status_valid_clear_f());
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}
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void gv11b_fb_hub_isr(struct gk20a *g)
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@@ -1525,3 +1523,66 @@ static int gv11b_fb_fix_page_fault(struct gk20a *g,
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pte[1], pte[0]);
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return err;
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}
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void fb_gv11b_write_mmu_fault_buffer_lo_hi(struct gk20a *g, u32 index,
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u32 addr_lo, u32 addr_hi)
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{
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nvgpu_writel(g, fb_mmu_fault_buffer_lo_r(index), addr_lo);
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nvgpu_writel(g, fb_mmu_fault_buffer_hi_r(index), addr_hi);
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}
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u32 fb_gv11b_read_mmu_fault_buffer_get(struct gk20a *g, u32 index)
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{
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return nvgpu_readl(g, fb_mmu_fault_buffer_get_r(index));
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}
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void fb_gv11b_write_mmu_fault_buffer_get(struct gk20a *g, u32 index,
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u32 reg_val)
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{
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nvgpu_writel(g, fb_mmu_fault_buffer_get_r(index), reg_val);
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}
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u32 fb_gv11b_read_mmu_fault_buffer_put(struct gk20a *g, u32 index)
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{
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return nvgpu_readl(g, fb_mmu_fault_buffer_put_r(index));
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}
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u32 fb_gv11b_read_mmu_fault_buffer_size(struct gk20a *g, u32 index)
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{
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return nvgpu_readl(g, fb_mmu_fault_buffer_size_r(index));
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}
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void fb_gv11b_write_mmu_fault_buffer_size(struct gk20a *g, u32 index,
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u32 reg_val)
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{
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nvgpu_writel(g, fb_mmu_fault_buffer_size_r(index), reg_val);
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}
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void fb_gv11b_read_mmu_fault_addr_lo_hi(struct gk20a *g,
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u32 *addr_lo, u32 *addr_hi)
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{
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*addr_lo = nvgpu_readl(g, fb_mmu_fault_addr_lo_r());
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*addr_hi = nvgpu_readl(g, fb_mmu_fault_addr_hi_r());
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}
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void fb_gv11b_read_mmu_fault_inst_lo_hi(struct gk20a *g,
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u32 *inst_lo, u32 *inst_hi)
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{
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*inst_lo = nvgpu_readl(g, fb_mmu_fault_inst_lo_r());
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*inst_hi = nvgpu_readl(g, fb_mmu_fault_inst_hi_r());
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}
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u32 fb_gv11b_read_mmu_fault_info(struct gk20a *g)
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{
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return nvgpu_readl(g, fb_mmu_fault_info_r());
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}
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|
||||
u32 fb_gv11b_read_mmu_fault_status(struct gk20a *g)
|
||||
{
|
||||
return nvgpu_readl(g, fb_mmu_fault_status_r());
|
||||
}
|
||||
|
||||
void fb_gv11b_write_mmu_fault_status(struct gk20a *g, u32 reg_val)
|
||||
{
|
||||
nvgpu_writel(g, fb_mmu_fault_status_r(), reg_val);
|
||||
}
|
||||
|
||||
@@ -82,4 +82,21 @@ void gv11b_handle_l2tlb_ecc_isr(struct gk20a *g, u32 ecc_status);
|
||||
void gv11b_handle_hubtlb_ecc_isr(struct gk20a *g, u32 ecc_status);
|
||||
void gv11b_handle_fillunit_ecc_isr(struct gk20a *g, u32 ecc_status);
|
||||
|
||||
void fb_gv11b_write_mmu_fault_buffer_lo_hi(struct gk20a *g, u32 index,
|
||||
u32 addr_lo, u32 addr_hi);
|
||||
u32 fb_gv11b_read_mmu_fault_buffer_get(struct gk20a *g, u32 index);
|
||||
void fb_gv11b_write_mmu_fault_buffer_get(struct gk20a *g, u32 index,
|
||||
u32 reg_val);
|
||||
u32 fb_gv11b_read_mmu_fault_buffer_put(struct gk20a *g, u32 index);
|
||||
u32 fb_gv11b_read_mmu_fault_buffer_size(struct gk20a *g, u32 index);
|
||||
void fb_gv11b_write_mmu_fault_buffer_size(struct gk20a *g, u32 index,
|
||||
u32 reg_val);
|
||||
void fb_gv11b_read_mmu_fault_addr_lo_hi(struct gk20a *g,
|
||||
u32 *addr_lo, u32 *addr_hi);
|
||||
void fb_gv11b_read_mmu_fault_inst_lo_hi(struct gk20a *g,
|
||||
u32 *inst_lo, u32 *inst_hi);
|
||||
u32 fb_gv11b_read_mmu_fault_info(struct gk20a *g);
|
||||
u32 fb_gv11b_read_mmu_fault_status(struct gk20a *g);
|
||||
void fb_gv11b_write_mmu_fault_status(struct gk20a *g, u32 reg_val);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -438,6 +438,23 @@ static const struct gpu_ops gv11b_ops = {
|
||||
.mem_unlock = NULL,
|
||||
.enable_hub_intr = gv11b_fb_enable_hub_intr,
|
||||
.disable_hub_intr = gv11b_fb_disable_hub_intr,
|
||||
.write_mmu_fault_buffer_lo_hi =
|
||||
fb_gv11b_write_mmu_fault_buffer_lo_hi,
|
||||
.write_mmu_fault_buffer_get =
|
||||
fb_gv11b_write_mmu_fault_buffer_get,
|
||||
.write_mmu_fault_buffer_size =
|
||||
fb_gv11b_write_mmu_fault_buffer_size,
|
||||
.write_mmu_fault_status = fb_gv11b_write_mmu_fault_status,
|
||||
.read_mmu_fault_buffer_get =
|
||||
fb_gv11b_read_mmu_fault_buffer_get,
|
||||
.read_mmu_fault_buffer_put =
|
||||
fb_gv11b_read_mmu_fault_buffer_put,
|
||||
.read_mmu_fault_buffer_size =
|
||||
fb_gv11b_read_mmu_fault_buffer_size,
|
||||
.read_mmu_fault_addr_lo_hi = fb_gv11b_read_mmu_fault_addr_lo_hi,
|
||||
.read_mmu_fault_inst_lo_hi = fb_gv11b_read_mmu_fault_inst_lo_hi,
|
||||
.read_mmu_fault_info = fb_gv11b_read_mmu_fault_info,
|
||||
.read_mmu_fault_status = fb_gv11b_read_mmu_fault_status,
|
||||
},
|
||||
.clock_gating = {
|
||||
.slcg_bus_load_gating_prod =
|
||||
|
||||
@@ -291,6 +291,23 @@ static const struct gpu_ops vgpu_gv11b_ops = {
|
||||
.hub_isr = gv11b_fb_hub_isr,
|
||||
.enable_hub_intr = gv11b_fb_enable_hub_intr,
|
||||
.disable_hub_intr = gv11b_fb_disable_hub_intr,
|
||||
.write_mmu_fault_buffer_lo_hi =
|
||||
fb_gv11b_write_mmu_fault_buffer_lo_hi,
|
||||
.write_mmu_fault_buffer_get =
|
||||
fb_gv11b_write_mmu_fault_buffer_get,
|
||||
.write_mmu_fault_buffer_size =
|
||||
fb_gv11b_write_mmu_fault_buffer_size,
|
||||
.write_mmu_fault_status = fb_gv11b_write_mmu_fault_status,
|
||||
.read_mmu_fault_buffer_get =
|
||||
fb_gv11b_read_mmu_fault_buffer_get,
|
||||
.read_mmu_fault_buffer_put =
|
||||
fb_gv11b_read_mmu_fault_buffer_put,
|
||||
.read_mmu_fault_buffer_size =
|
||||
fb_gv11b_read_mmu_fault_buffer_size,
|
||||
.read_mmu_fault_addr_lo_hi = fb_gv11b_read_mmu_fault_addr_lo_hi,
|
||||
.read_mmu_fault_inst_lo_hi = fb_gv11b_read_mmu_fault_inst_lo_hi,
|
||||
.read_mmu_fault_info = fb_gv11b_read_mmu_fault_info,
|
||||
.read_mmu_fault_status = fb_gv11b_read_mmu_fault_status,
|
||||
},
|
||||
.clock_gating = {
|
||||
.slcg_bus_load_gating_prod =
|
||||
|
||||
Reference in New Issue
Block a user