gpu: nvgpu: add macros related to error reporting

This patch does the following:
- adds macros related to error reporting
- introduces a flag to enable polling for error reporting

JIRA NVGPU-8094
Bug 200729736

Change-Id: Ib02e8b7a7765e45eb1b3b3c6dba3720d5421a638
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2683864
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit

drivers/gpu/nvgpu/common/cic/mon/cic_mon_priv.h

@@ -32,10 +32,6 @@ struct nvgpu_err_msg;
 struct gpu_err_header;
 
 #define ERR_INJECT_TEST_PATTERN		(0xA5U)
-#define HW_UNIT_ID_MASK			(0xFU)
-#define ERR_ID_MASK			(0x1FU)
-#define ERR_ID_FIELD_SHIFT		(4U)
-#define CORRECTED_BIT_FIELD_SHIFT	(9U)
 
 /*
  * This struct contains members related to error-policy look-up table,

drivers/gpu/nvgpu/include/nvgpu/cic_mon.h

@@ -27,7 +27,15 @@
 #include <nvgpu/static_analysis.h>
 #include <nvgpu/log.h>
 
-#define MISC_EC_SW_ERR_CODE_0	0U
+#define MISC_EC_SW_ERR_CODE_0		(0U)
+#define HW_UNIT_ID_MASK			(0xFU)
+#define ERR_ID_MASK			(0x1FU)
+#define ERR_ID_FIELD_SHIFT		(4U)
+#define CORRECTED_BIT_FIELD_SHIFT	(9U)
+#define ERR_REPORT_TIMEOUT_US		(5000U)
+#define SS_WAIT_DURATION_US		(500U)
+#define MAX_SS_RETRIES (ERR_REPORT_TIMEOUT_US / SS_WAIT_DURATION_US)
+#define ERR_TYPE_MASK		((1U) << (CORRECTED_BIT_FIELD_SHIFT))
 
 #define U32_BITS		32U
 #define DIV_BY_U32_BITS(x)	((x) / U32_BITS)

drivers/gpu/nvgpu/include/nvgpu/gk20a.h

@@ -906,6 +906,10 @@ struct gk20a {
 	struct nvgpu_nvs_scheduler *scheduler;
 	struct nvgpu_mutex sched_mutex;
 #endif
+
+#ifdef CONFIG_NVGPU_ENABLE_MISC_EC
+	bool enable_polling;
+#endif
 };
 
 /**