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gpu: nvgpu: Handle no GPU cases in helper funcs

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In many helper functions like gk20a_readl() the code assumed that
the GPU is present and registers and available. However, during
GPU shutdown this may not be the case.

In theory the driver should not be accessing GPU registers during
GPU shutdown (since shutdown is triggered by GPU registers being
unavailable) but these changes handle any missed cases where this
may happen.

This goes for GPU device access as well. Many parts of the code
assume that if the struct gk20a is valid, the the GPU dev must be
there are well. This isn't always the case, it seems.

Bug 1816516
Bug 1807277

Change-Id: Icaf6fd56ab7860724e77bda0f5e8d48f0da15642
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1250024
(cherry picked from commit e8c9997b2d7cd424d798ecfce1307e6193c0cf32)
Reviewed-on: http://git-master/r/1274473
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Alex Waterman
2016-11-07 16:12:45 -08:00
committed by mobile promotions
parent b82d27e384
commit a0242464f5
2 changed files with 66 additions and 21 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -309,6 +309,11 @@ int gk20a_restore_registers(struct gk20a *g)
return 0;
}
void __gk20a_warn_on_no_regs(void)
{
WARN_ONCE(1, "Attempted access to GPU regs after unmapping!");
}
static void kunmap_and_free_iopage(void **kvaddr, struct page **page)
{
if (*kvaddr) {

82
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -1107,11 +1107,18 @@ do { \
#endif
#define gk20a_err(d, fmt, arg...) \
dev_err(d, "%s: " fmt "\n", __func__, ##arg)
#define gk20a_err(d, fmt, arg...) \
do { \
if (d) \
dev_err(d, "%s: " fmt "\n", __func__, ##arg); \
} while (0)
#define gk20a_warn(d, fmt, arg...) \
do { \
if (d) \
dev_warn(d, "%s: " fmt "\n", __func__, ##arg); \
} while (0)
#define gk20a_warn(d, fmt, arg...) \
dev_warn(d, "%s: " fmt "\n", __func__, ##arg)
#define gk20a_dbg_fn(fmt, arg...) \
gk20a_dbg(gpu_dbg_fn, fmt, ##arg)
@@ -1126,44 +1133,74 @@ int gk20a_lockout_registers(struct gk20a *g);
int gk20a_restore_registers(struct gk20a *g);
void __nvgpu_check_gpu_state(struct gk20a *g);
void __gk20a_warn_on_no_regs(void);
static inline void gk20a_writel(struct gk20a *g, u32 r, u32 v)
{
gk20a_dbg(gpu_dbg_reg, " r=0x%x v=0x%x", r, v);
writel_relaxed(v, g->regs + r);
wmb();
if (unlikely(!g->regs)) {
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
writel_relaxed(v, g->regs + r);
wmb();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
}
static inline u32 gk20a_readl(struct gk20a *g, u32 r)
{
u32 v = readl(g->regs + r);
if (v == 0xffffffff)
__nvgpu_check_gpu_state(g);
u32 v = 0xffffffff;
gk20a_dbg(gpu_dbg_reg, " r=0x%x v=0x%x", r, v);
if (unlikely(!g->regs)) {
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
v = readl(g->regs + r);
if (v == 0xffffffff)
__nvgpu_check_gpu_state(g);
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
return v;
}
static inline void gk20a_writel_check(struct gk20a *g, u32 r, u32 v)
{
gk20a_dbg(gpu_dbg_reg, " r=0x%x v=0x%x", r, v);
wmb();
do {
writel_relaxed(v, g->regs + r);
} while (readl(g->regs + r) != v);
if (unlikely(!g->regs)) {
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x (failed)", r, v);
} else {
wmb();
do {
writel_relaxed(v, g->regs + r);
} while (readl(g->regs + r) != v);
gk20a_dbg(gpu_dbg_reg, "r=0x%x v=0x%x", r, v);
}
}
static inline void gk20a_bar1_writel(struct gk20a *g, u32 b, u32 v)
{
gk20a_dbg(gpu_dbg_reg, " b=0x%x v=0x%x", b, v);
wmb();
writel_relaxed(v, g->bar1 + b);
if (unlikely(!g->bar1)) {
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
} else {
wmb();
writel_relaxed(v, g->bar1 + b);
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
}
}
static inline u32 gk20a_bar1_readl(struct gk20a *g, u32 b)
{
u32 v = readl(g->bar1 + b);
gk20a_dbg(gpu_dbg_reg, " b=0x%x v=0x%x", b, v);
u32 v = 0xffffffff;
if (unlikely(!g->bar1)) {
__gk20a_warn_on_no_regs();
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x (failed)", b, v);
} else {
v = readl(g->bar1 + b);
gk20a_dbg(gpu_dbg_reg, "b=0x%x v=0x%x", b, v);
}
return v;
}
@@ -1174,6 +1211,9 @@ static inline struct device *dev_from_gk20a(struct gk20a *g)
}
static inline struct gk20a *gk20a_from_dev(struct device *dev)
{
if (!dev)
return NULL;
return ((struct gk20a_platform *)dev_get_drvdata(dev))->g;
}
static inline struct gk20a *gk20a_from_as(struct gk20a_as *as)