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gpu: nvgpu: fix various MISRA 10.1 bool violations

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This patch corrects a handful of MISRA 10.1 violations involving
illegal arithmetic operations (e.g. bitwise OR) on boolean values:

 * fix to status handling in regops validation code
 * fix to debugger event handling in gr code
 * fix to entries_left tracking in runlist construct code
 * fix to verbose channel dumping and reset tracking in fifo code

JIRA NVGPU-650

Change-Id: I3c3d9123b5a0e08fc936d0e63d51de99fc310ade
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1810957
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2018-08-31 15:43:24 -07:00
committed by mobile promotions
parent cf394f82d4
commit a18f364fd2
3 changed files with 22 additions and 15 deletions
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7
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -5583,11 +5583,12 @@ int gr_gk20a_handle_sm_exception(struct gk20a *g, u32 gpc, u32 tpc, u32 sm,
}
}
if (ignore_debugger)
if (ignore_debugger) {
nvgpu_log(g, gpu_dbg_intr | gpu_dbg_gpu_dbg,
"ignore_debugger set, skipping event posting");
else
*post_event |= true;
} else {
*post_event = true;
}
return ret;
}