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gpu: nvgpu: add is_gsp_supported flag

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This patch adds is_gsp_supported flag and initializes it for GA10B,
TU104. Further, this flag is checked before initializaing GSP LITE
falcon.

JIRA NVGPU-9983

Change-Id: If0a4a3095c15cac113895f3d114e731f35211c5d
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2902651
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2023-05-12 06:28:38 +00:00
committed by mobile promotions
parent 789ebda23d
commit a321679a5d
4 changed files with 13 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/common/init/nvgpu_init.c
View File

@@ -273,11 +273,13 @@ static int nvgpu_falcons_sw_init(struct gk20a *g)
} }
#endif #endif
if (g->ops.gsp.is_gsp_supported != false) {
err = g->ops.falcon.falcon_sw_init(g, FALCON_ID_GSPLITE); err = g->ops.falcon.falcon_sw_init(g, FALCON_ID_GSPLITE);
if (err != 0) { if (err != 0) {
nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE"); nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE");
goto done_nvenc; goto done_nvenc;
} }
}
return 0; return 0;
@@ -308,7 +310,9 @@ static void nvgpu_falcons_sw_free(struct gk20a *g)
g->ops.falcon.falcon_sw_free(g, FALCON_ID_FECS); g->ops.falcon.falcon_sw_free(g, FALCON_ID_FECS);
#ifdef CONFIG_NVGPU_DGPU #ifdef CONFIG_NVGPU_DGPU
if (g->ops.gsp.is_gsp_supported != false) {
g->ops.falcon.falcon_sw_free(g, FALCON_ID_GSPLITE); g->ops.falcon.falcon_sw_free(g, FALCON_ID_GSPLITE);
}
g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVDEC); g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVDEC);
g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVENC); g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVENC);
g->ops.falcon.falcon_sw_free(g, FALCON_ID_SEC2); g->ops.falcon.falcon_sw_free(g, FALCON_ID_SEC2);

1
drivers/gpu/nvgpu/hal/init/hal_ga10b.c
View File

@@ -1353,6 +1353,7 @@ static const struct gops_therm ga10b_ops_therm = {
}; };
static const struct gops_gsp ga10b_ops_gsp = { static const struct gops_gsp ga10b_ops_gsp = {
.is_gsp_supported = true,
.falcon_base_addr = ga10b_gsp_falcon_base_addr, .falcon_base_addr = ga10b_gsp_falcon_base_addr,
.falcon2_base_addr = ga10b_gsp_falcon2_base_addr, .falcon2_base_addr = ga10b_gsp_falcon2_base_addr,
.gsp_reset = ga10b_gsp_engine_reset, .gsp_reset = ga10b_gsp_engine_reset,

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -1692,6 +1692,7 @@ static const struct gops_sec2 tu104_ops_sec2 = {
#ifdef CONFIG_NVGPU_LS_PMU #ifdef CONFIG_NVGPU_LS_PMU
static const struct gops_gsp tu104_ops_gsp = { static const struct gops_gsp tu104_ops_gsp = {
.is_gsp_supported = true,
.falcon_base_addr = tu104_gsp_falcon_base_addr, .falcon_base_addr = tu104_gsp_falcon_base_addr,
.falcon_setup_boot_config = tu104_gsp_flcn_setup_boot_config, .falcon_setup_boot_config = tu104_gsp_flcn_setup_boot_config,
.gsp_reset = tu104_gsp_reset, .gsp_reset = tu104_gsp_reset,

3
drivers/gpu/nvgpu/include/nvgpu/gops/gsp.h
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -36,6 +36,7 @@ struct gops_gsp {
int (*gsp_reset)(struct gk20a *g); int (*gsp_reset)(struct gk20a *g);
bool (*validate_mem_integrity)(struct gk20a *g); bool (*validate_mem_integrity)(struct gk20a *g);
bool (*is_debug_mode_enabled)(struct gk20a *g); bool (*is_debug_mode_enabled)(struct gk20a *g);
bool is_gsp_supported;
#ifdef CONFIG_NVGPU_GSP_SCHEDULER #ifdef CONFIG_NVGPU_GSP_SCHEDULER
u32 (*gsp_get_queue_head)(u32 i); u32 (*gsp_get_queue_head)(u32 i);
u32 (*gsp_get_queue_head_size)(void); u32 (*gsp_get_queue_head_size)(void);