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gpu: nvgpu: add is_gsp_supported flag
This patch adds is_gsp_supported flag and initializes it for GA10B, TU104. Further, this flag is checked before initializaing GSP LITE falcon. JIRA NVGPU-9983 Change-Id: If0a4a3095c15cac113895f3d114e731f35211c5d Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2902651 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -273,10 +273,12 @@ static int nvgpu_falcons_sw_init(struct gk20a *g)
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}
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#endif
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err = g->ops.falcon.falcon_sw_init(g, FALCON_ID_GSPLITE);
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if (err != 0) {
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nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE");
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goto done_nvenc;
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if (g->ops.gsp.is_gsp_supported != false) {
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err = g->ops.falcon.falcon_sw_init(g, FALCON_ID_GSPLITE);
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if (err != 0) {
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nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE");
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goto done_nvenc;
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}
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}
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return 0;
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@@ -308,7 +310,9 @@ static void nvgpu_falcons_sw_free(struct gk20a *g)
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_FECS);
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#ifdef CONFIG_NVGPU_DGPU
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_GSPLITE);
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if (g->ops.gsp.is_gsp_supported != false) {
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_GSPLITE);
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}
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVDEC);
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_NVENC);
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g->ops.falcon.falcon_sw_free(g, FALCON_ID_SEC2);
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@@ -1353,6 +1353,7 @@ static const struct gops_therm ga10b_ops_therm = {
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};
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static const struct gops_gsp ga10b_ops_gsp = {
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.is_gsp_supported = true,
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.falcon_base_addr = ga10b_gsp_falcon_base_addr,
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.falcon2_base_addr = ga10b_gsp_falcon2_base_addr,
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.gsp_reset = ga10b_gsp_engine_reset,
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@@ -1692,6 +1692,7 @@ static const struct gops_sec2 tu104_ops_sec2 = {
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#ifdef CONFIG_NVGPU_LS_PMU
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static const struct gops_gsp tu104_ops_gsp = {
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.is_gsp_supported = true,
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.falcon_base_addr = tu104_gsp_falcon_base_addr,
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.falcon_setup_boot_config = tu104_gsp_flcn_setup_boot_config,
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.gsp_reset = tu104_gsp_reset,
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -36,6 +36,7 @@ struct gops_gsp {
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int (*gsp_reset)(struct gk20a *g);
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bool (*validate_mem_integrity)(struct gk20a *g);
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bool (*is_debug_mode_enabled)(struct gk20a *g);
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bool is_gsp_supported;
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#ifdef CONFIG_NVGPU_GSP_SCHEDULER
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u32 (*gsp_get_queue_head)(u32 i);
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u32 (*gsp_get_queue_head_size)(void);
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