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gpu: nvgpu: MISRA 14.4 err/ret/status as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans in the controlling expression of an if statement or an iteration statement. Fix violations where the integer variables err, ret, status are used as booleans in the controlling expression of if and loop statements. JIRA NVGPU-1019 Change-Id: I9e18ffc961d485225732c34d3ca561e84d182d07 Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1921370 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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commit
a39c48e3e2
@@ -47,7 +47,7 @@ static int volt_device_pmu_data_init_super(struct gk20a *g,
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struct nv_pmu_volt_volt_device_boardobj_set *pset;
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status = boardobj_pmudatainit_super(g, pboard_obj, ppmudata);
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if (status) {
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if (status != 0) {
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return status;
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}
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@@ -70,7 +70,7 @@ static int volt_device_pmu_data_init_pwm(struct gk20a *g,
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struct nv_pmu_volt_volt_device_pwm_boardobj_set *pset;
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status = volt_device_pmu_data_init_super(g, pboard_obj, ppmudata);
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if (status) {
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if (status != 0) {
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return status;
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}
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@@ -93,7 +93,7 @@ static int construct_volt_device(struct gk20a *g,
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int status = 0;
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status = boardobj_construct_super(g, ppboardobj, size, pargs);
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if (status) {
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if (status != 0) {
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return status;
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}
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@@ -125,7 +125,7 @@ static int construct_pwm_volt_device(struct gk20a *g,
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int status = 0;
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status = construct_volt_device(g, ppboardobj, size, pargs);
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if (status) {
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if (status != 0) {
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return status;
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}
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@@ -191,7 +191,7 @@ static struct voltage_device *volt_volt_device_construct(struct gk20a *g,
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if (BOARDOBJ_GET_TYPE(pargs) == CTRL_VOLT_DEVICE_TYPE_PWM) {
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int status = construct_pwm_volt_device(g, &pboard_obj,
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sizeof(struct voltage_device_pwm), pargs);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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" Could not allocate memory for VOLTAGE_DEVICE type (%x).",
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BOARDOBJ_GET_TYPE(pargs));
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@@ -329,7 +329,7 @@ static int volt_get_voltage_device_table_1x_psv(struct gk20a *g,
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status = boardobjgrp_objinsert(
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&p_Volt_Device_Meta_Data->volt_devices.super,
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(struct boardobj *)pvolt_dev, entry_Idx);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"could not add VOLTAGE_DEVICE for entry %d into boardobjgrp ",
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entry_Idx);
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@@ -394,10 +394,10 @@ done:
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return status;
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}
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static u32 volt_get_volt_devices_table(struct gk20a *g,
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static int volt_get_volt_devices_table(struct gk20a *g,
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struct voltage_device_metadata *pvolt_device_metadata)
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{
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u32 status = 0;
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int status = 0;
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u8 *volt_device_table_ptr = NULL;
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struct vbios_voltage_device_table_1x_header header = { 0 };
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struct vbios_voltage_device_table_1x_entry entry = { 0 };
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@@ -482,10 +482,10 @@ static int volt_device_volt_cmp(const void *a, const void *b)
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return (int)a_entry->voltage_uv - (int)b_entry->voltage_uv;
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}
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static u32 volt_device_state_init(struct gk20a *g,
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static int volt_device_state_init(struct gk20a *g,
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struct voltage_device *pvolt_dev)
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{
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u32 status = 0;
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int status = 0;
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struct voltage_rail *pRail = NULL;
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u8 rail_idx = 0;
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@@ -523,7 +523,7 @@ static u32 volt_device_state_init(struct gk20a *g,
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status = volt_rail_volt_dev_register(g, pRail,
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BOARDOBJ_GET_IDX(pvolt_dev), pvolt_dev->operation_type);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"Failed to register the device with rail obj");
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goto done;
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@@ -531,7 +531,7 @@ static u32 volt_device_state_init(struct gk20a *g,
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}
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done:
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if (status) {
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if (status != 0) {
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nvgpu_err(g, "Error in building rail sw state device sw");
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}
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@@ -557,9 +557,9 @@ int volt_dev_pmu_setup(struct gk20a *g)
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return status;
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}
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u32 volt_dev_sw_setup(struct gk20a *g)
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int volt_dev_sw_setup(struct gk20a *g)
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{
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u32 status = 0;
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int status = 0;
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struct boardobjgrp *pboardobjgrp = NULL;
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struct voltage_device *pvolt_device;
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u8 i;
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@@ -568,7 +568,7 @@ u32 volt_dev_sw_setup(struct gk20a *g)
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status = boardobjgrpconstruct_e32(g,
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&g->perf_pmu.volt.volt_dev_metadata.volt_devices);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"error creating boardobjgrp for volt rail, status - 0x%x",
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status);
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@@ -583,7 +583,7 @@ u32 volt_dev_sw_setup(struct gk20a *g)
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/* Obtain Voltage Rail Table from VBIOS */
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status = volt_get_volt_devices_table(g, &g->perf_pmu.volt.
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volt_dev_metadata);
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if (status) {
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if (status != 0) {
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goto done;
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}
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@@ -592,7 +592,7 @@ u32 volt_dev_sw_setup(struct gk20a *g)
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status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
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volt, VOLT, volt_device, VOLT_DEVICE);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
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status);
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@@ -602,7 +602,7 @@ u32 volt_dev_sw_setup(struct gk20a *g)
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status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
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&g->perf_pmu.volt.volt_dev_metadata.volt_devices.super,
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volt, VOLT, volt_device, VOLT_DEVICE);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
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status);
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@@ -614,7 +614,7 @@ u32 volt_dev_sw_setup(struct gk20a *g)
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super),
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struct voltage_device *, pvolt_device, i) {
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status = volt_device_state_init(g, pvolt_device);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"failure while executing devices's state init interface");
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nvgpu_err(g,
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@@ -71,7 +71,7 @@ struct voltage_device_pwm_entry {
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};
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/* PWM end */
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u32 volt_dev_sw_setup(struct gk20a *g);
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int volt_dev_sw_setup(struct gk20a *g);
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int volt_dev_pmu_setup(struct gk20a *g);
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#endif /* NVGPU_VOLT_DEV_H */
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@@ -60,13 +60,13 @@ static void volt_rpc_pmucmdhandler(struct gk20a *g, struct pmu_msg *msg,
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}
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static u32 volt_pmu_rpc_execute(struct gk20a *g,
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static int volt_pmu_rpc_execute(struct gk20a *g,
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struct nv_pmu_volt_rpc *prpc_call)
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{
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struct pmu_cmd cmd;
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struct pmu_msg msg;
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struct pmu_payload payload;
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u32 status = 0;
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int status = 0;
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u32 seqdesc;
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struct volt_rpc_pmucmdhandler_params handler;
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@@ -98,7 +98,7 @@ static u32 volt_pmu_rpc_execute(struct gk20a *g,
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PMU_COMMAND_QUEUE_LPQ,
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volt_rpc_pmucmdhandler, (void *)&handler,
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&seqdesc, ~0);
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if (status) {
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if (status != 0) {
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nvgpu_err(g, "unable to post volt RPC cmd %x",
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cmd.cmd.volt.cmd_type);
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goto volt_pmu_rpc_execute;
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@@ -117,15 +117,15 @@ volt_pmu_rpc_execute:
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return status;
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}
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u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g)
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int nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g)
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{
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struct nv_pmu_volt_rpc rpc_call = { 0 };
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u32 status = 0;
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int status = 0;
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rpc_call.function = NV_PMU_VOLT_RPC_ID_LOAD;
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status = volt_pmu_rpc_execute(g, &rpc_call);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"Error while executing LOAD RPC: status = 0x%08x.",
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status);
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@@ -134,15 +134,15 @@ u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g)
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return status;
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}
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u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g)
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int nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g)
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{
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struct nvgpu_pmu *pmu = &g->pmu;
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struct nv_pmu_rpc_struct_volt_load rpc;
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u32 status = 0;
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int status = 0;
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memset(&rpc, 0, sizeof(struct nv_pmu_rpc_struct_volt_load));
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PMU_RPC_EXECUTE(status, pmu, VOLT, LOAD, &rpc, 0);
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if (status) {
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if (status != 0) {
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nvgpu_err(g, "Failed to execute RPC status=0x%x",
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status);
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}
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@@ -150,11 +150,11 @@ u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g)
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return status;
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}
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u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
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int nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
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u8 volt_domain, u32 *pvoltage_uv)
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{
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struct nv_pmu_volt_rpc rpc_call = { 0 };
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u32 status = 0;
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int status = 0;
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u8 rail_idx;
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rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain);
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@@ -172,7 +172,7 @@ u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
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/* Execute the voltage get request via PMU RPC. */
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status = volt_pmu_rpc_execute(g, &rpc_call);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"Error while executing volt_rail_get_voltage rpc");
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return status;
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@@ -184,12 +184,12 @@ u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
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return status;
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}
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u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
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int nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
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u8 volt_domain, u32 *pvoltage_uv)
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{
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struct nvgpu_pmu *pmu = &g->pmu;
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struct nv_pmu_rpc_struct_volt_volt_rail_get_voltage rpc;
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u32 status = 0;
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int status = 0;
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u8 rail_idx;
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rail_idx = volt_rail_volt_domain_convert_to_idx(g, volt_domain);
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@@ -206,7 +206,7 @@ u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
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rpc.rail_idx = rail_idx;
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PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_RAIL_GET_VOLTAGE, &rpc, 0);
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if (status) {
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if (status != 0) {
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nvgpu_err(g, "Failed to execute RPC status=0x%x",
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status);
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}
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@@ -216,12 +216,12 @@ u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
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return status;
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}
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static u32 volt_policy_set_voltage(struct gk20a *g, u8 client_id,
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static int volt_policy_set_voltage(struct gk20a *g, u8 client_id,
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struct ctrl_perf_volt_rail_list *prail_list)
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{
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struct nv_pmu_volt_rpc rpc_call = { 0 };
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struct obj_volt *pvolt = &g->perf_pmu.volt;
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u32 status = 0;
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int status = 0;
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u8 policy_idx = CTRL_VOLT_POLICY_INDEX_INVALID;
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u8 i = 0;
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@@ -260,7 +260,7 @@ static u32 volt_policy_set_voltage(struct gk20a *g, u8 client_id,
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/* Execute the voltage change request via PMU RPC. */
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status = volt_pmu_rpc_execute(g, &rpc_call);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"Error while executing VOLT_POLICY_SET_VOLTAGE RPC");
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}
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@@ -269,7 +269,7 @@ exit:
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return status;
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}
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static u32 volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id,
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static int volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id,
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struct ctrl_volt_volt_rail_list_v1 *prail_list)
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{
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struct nvgpu_pmu *pmu = &g->pmu;
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@@ -281,7 +281,7 @@ static u32 volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id,
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rpc.rail_list = *prail_list;
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PMU_RPC_EXECUTE_CPB(status, pmu, VOLT, VOLT_SET_VOLTAGE, &rpc, 0);
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if (status) {
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if (status != 0) {
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nvgpu_err(g, "Failed to execute RPC status=0x%x",
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status);
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}
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@@ -289,7 +289,7 @@ static u32 volt_set_voltage_gv10x_rpc(struct gk20a *g, u8 client_id,
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return status;
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}
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u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
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int nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
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u32 sram_voltage_uv)
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{
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int status = 0;
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@@ -308,7 +308,7 @@ u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
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return status;
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}
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u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
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int nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
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u32 sram_voltage_uv)
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{
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int status = 0;
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@@ -328,13 +328,13 @@ u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
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return status;
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}
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u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv, u32 sram_voltage_uv)
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int volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv, u32 sram_voltage_uv)
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{
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return g->ops.pmu_ver.volt.volt_set_voltage(g,
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logic_voltage_uv, sram_voltage_uv);
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}
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u32 volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv)
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int volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv)
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{
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return g->ops.pmu_ver.volt.volt_get_voltage(g,
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volt_domain, voltage_uv);
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@@ -344,7 +344,7 @@ static int volt_policy_set_noiseaware_vmin(struct gk20a *g,
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struct ctrl_volt_volt_rail_list *prail_list)
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{
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struct nv_pmu_volt_rpc rpc_call = { 0 };
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u32 status = 0;
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int status = 0;
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/* Set RPC parameters. */
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rpc_call.function = NV_PMU_VOLT_RPC_ID_VOLT_RAIL_SET_NOISE_UNAWARE_VMIN;
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@@ -355,7 +355,7 @@ static int volt_policy_set_noiseaware_vmin(struct gk20a *g,
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/* Execute the voltage change request via PMU RPC. */
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status = volt_pmu_rpc_execute(g, &rpc_call);
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if (status) {
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if (status != 0) {
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nvgpu_err(g,
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"Error while executing VOLT_POLICY_SET_VOLTAGE RPC");
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return -EINVAL;
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@@ -24,23 +24,23 @@
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#define NVGPU_VOLT_PMU_H
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u32 volt_pmu_send_load_cmd_to_pmu(struct gk20a *g);
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u32 volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
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int volt_set_voltage(struct gk20a *g, u32 logic_voltage_uv,
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u32 sram_voltage_uv);
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u32 volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv);
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int volt_get_voltage(struct gk20a *g, u32 volt_domain, u32 *voltage_uv);
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int volt_set_noiseaware_vmin(struct gk20a *g, u32 logic_voltage_uv,
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u32 sram_voltage_uv);
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u32 nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
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int nvgpu_volt_set_voltage_gp10x(struct gk20a *g, u32 logic_voltage_uv,
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u32 sram_voltage_uv);
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u32 nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
|
||||
int nvgpu_volt_rail_get_voltage_gp10x(struct gk20a *g,
|
||||
u8 volt_domain, u32 *pvoltage_uv);
|
||||
u32 nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g);
|
||||
int nvgpu_volt_send_load_cmd_to_pmu_gp10x(struct gk20a *g);
|
||||
|
||||
u32 nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
|
||||
int nvgpu_volt_set_voltage_gv10x(struct gk20a *g, u32 logic_voltage_uv,
|
||||
u32 sram_voltage_uv);
|
||||
u32 nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
|
||||
int nvgpu_volt_rail_get_voltage_gv10x(struct gk20a *g,
|
||||
u8 volt_domain, u32 *pvoltage_uv);
|
||||
u32 nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g);
|
||||
int nvgpu_volt_send_load_cmd_to_pmu_gv10x(struct gk20a *g);
|
||||
|
||||
|
||||
#endif /* NVGPU_VOLT_PMU_H */
|
||||
|
||||
@@ -44,7 +44,7 @@ static int construct_volt_policy(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = boardobj_construct_super(g, ppboardobj, size, pArgs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -64,7 +64,7 @@ static int construct_volt_policy_split_rail(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = construct_volt_policy(g, ppboardobj, size, pArgs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -89,7 +89,7 @@ static int construct_volt_policy_single_rail(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = construct_volt_policy(g, ppboardobj, size, pArgs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -108,7 +108,7 @@ static int volt_policy_pmu_data_init_single_rail(struct gk20a *g,
|
||||
struct nv_pmu_volt_volt_policy_sr_boardobj_set *pset;
|
||||
|
||||
status = volt_policy_pmu_data_init_super(g, pboardobj, ppmudata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
@@ -146,7 +146,7 @@ static int volt_policy_pmu_data_init_sr_multi_step(struct gk20a *g,
|
||||
struct nv_pmu_volt_volt_policy_sr_multi_step_boardobj_set *pset;
|
||||
|
||||
status = volt_policy_pmu_data_init_single_rail(g, pboardobj, ppmudata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
@@ -172,7 +172,7 @@ static int volt_construct_volt_policy_single_rail_multi_step(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = construct_volt_policy_single_rail(g, ppboardobj, size, pargs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -200,7 +200,7 @@ static int volt_policy_pmu_data_init_split_rail(struct gk20a *g,
|
||||
struct nv_pmu_volt_volt_policy_splt_r_boardobj_set *pset;
|
||||
|
||||
status = volt_policy_pmu_data_init_super(g, pboardobj, ppmudata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
@@ -226,7 +226,7 @@ static int volt_construct_volt_policy_split_rail_single_step(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = construct_volt_policy_split_rail(g, ppboardobj, size, pargs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -247,7 +247,7 @@ static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *
|
||||
&pboard_obj,
|
||||
sizeof(struct voltage_policy_split_rail_single_step),
|
||||
pargs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"Could not allocate memory for voltage_policy");
|
||||
pboard_obj = NULL;
|
||||
@@ -258,7 +258,7 @@ static struct voltage_policy *volt_volt_policy_construct(struct gk20a *g, void *
|
||||
&pboard_obj,
|
||||
sizeof(struct voltage_policy_single_rail_multi_step),
|
||||
pargs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"Could not allocate memory for voltage_policy");
|
||||
pboard_obj = NULL;
|
||||
@@ -394,7 +394,7 @@ static int volt_get_volt_policy_table(struct gk20a *g,
|
||||
status = boardobjgrp_objinsert(
|
||||
&pvolt_policy_metadata->volt_policies.super,
|
||||
(struct boardobj *)ppolicy, i);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"could not add volt_policy for entry %d into boardobjgrp ",
|
||||
i);
|
||||
@@ -457,7 +457,7 @@ static int _volt_policy_grp_pmudatainit_super(struct gk20a *g,
|
||||
int status = 0;
|
||||
|
||||
status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error updating pmu boardobjgrp for volt policy 0x%x",
|
||||
status);
|
||||
@@ -499,7 +499,7 @@ int volt_policy_sw_setup(struct gk20a *g)
|
||||
|
||||
status = boardobjgrpconstruct_e32(g,
|
||||
&g->perf_pmu.volt.volt_policy_metadata.volt_policies);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error creating boardobjgrp for volt rail, status - 0x%x",
|
||||
status);
|
||||
@@ -516,7 +516,7 @@ int volt_policy_sw_setup(struct gk20a *g)
|
||||
/* Obtain Voltage Rail Table from VBIOS */
|
||||
status = volt_get_volt_policy_table(g, &g->perf_pmu.volt.
|
||||
volt_policy_metadata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
@@ -525,7 +525,7 @@ int volt_policy_sw_setup(struct gk20a *g)
|
||||
|
||||
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
|
||||
volt, VOLT, volt_policy, VOLT_POLICY);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
|
||||
status);
|
||||
@@ -535,7 +535,7 @@ int volt_policy_sw_setup(struct gk20a *g)
|
||||
status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
|
||||
&g->perf_pmu.volt.volt_policy_metadata.volt_policies.super,
|
||||
volt, VOLT, volt_policy, VOLT_POLICY);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
|
||||
status);
|
||||
|
||||
@@ -53,10 +53,10 @@ u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain)
|
||||
return CTRL_BOARDOBJ_IDX_INVALID;
|
||||
}
|
||||
|
||||
u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
|
||||
int volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
|
||||
*pvolt_rail, u8 volt_dev_idx, u8 operation_type)
|
||||
{
|
||||
u32 status = 0;
|
||||
int status = 0;
|
||||
|
||||
if (operation_type == CTRL_VOLT_DEVICE_OPERATION_TYPE_DEFAULT) {
|
||||
if (pvolt_rail->volt_dev_idx_default ==
|
||||
@@ -90,17 +90,17 @@ u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
|
||||
volt_dev_idx);
|
||||
|
||||
exit:
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g, "Failed to register VOLTAGE_DEVICE");
|
||||
}
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static u32 volt_rail_state_init(struct gk20a *g,
|
||||
static int volt_rail_state_init(struct gk20a *g,
|
||||
struct voltage_rail *pvolt_rail)
|
||||
{
|
||||
u32 status = 0;
|
||||
int status = 0;
|
||||
u32 i;
|
||||
|
||||
pvolt_rail->volt_dev_idx_default = CTRL_BOARDOBJ_IDX_INVALID;
|
||||
@@ -122,7 +122,7 @@ static u32 volt_rail_state_init(struct gk20a *g,
|
||||
NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX;
|
||||
|
||||
status = boardobjgrpmask_e32_init(&pvolt_rail->volt_dev_mask, NULL);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"Failed to initialize BOARDOBJGRPMASK of VOLTAGE_DEVICEs");
|
||||
}
|
||||
@@ -141,7 +141,7 @@ static int volt_rail_init_pmudata_super(struct gk20a *g,
|
||||
nvgpu_log_info(g, " ");
|
||||
|
||||
status = boardobj_pmudatainit_super(g, board_obj_ptr, ppmudata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return status;
|
||||
}
|
||||
|
||||
@@ -170,7 +170,7 @@ static int volt_rail_init_pmudata_super(struct gk20a *g,
|
||||
status = boardobjgrpmask_export(&prail->volt_dev_mask.super,
|
||||
prail->volt_dev_mask.super.bitcount,
|
||||
&rail_pmu_data->volt_dev_mask.super);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"Failed to export BOARDOBJGRPMASK of VOLTAGE_DEVICEs");
|
||||
}
|
||||
@@ -190,7 +190,7 @@ static struct voltage_rail *construct_volt_rail(struct gk20a *g, void *pargs)
|
||||
nvgpu_log_info(g, " ");
|
||||
status = boardobj_construct_super(g, &board_obj_ptr,
|
||||
sizeof(struct voltage_rail), pargs);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@@ -424,7 +424,7 @@ int volt_rail_sw_setup(struct gk20a *g)
|
||||
|
||||
status = boardobjgrpconstruct_e32(g,
|
||||
&g->perf_pmu.volt.volt_rail_metadata.volt_rails);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error creating boardobjgrp for volt rail, status - 0x%x",
|
||||
status);
|
||||
@@ -442,7 +442,7 @@ int volt_rail_sw_setup(struct gk20a *g)
|
||||
/* Obtain Voltage Rail Table from VBIOS */
|
||||
status = volt_get_volt_rail_table(g, &g->perf_pmu.volt.
|
||||
volt_rail_metadata);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
goto done;
|
||||
}
|
||||
|
||||
@@ -451,7 +451,7 @@ int volt_rail_sw_setup(struct gk20a *g)
|
||||
|
||||
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
|
||||
volt, VOLT, volt_rail, VOLT_RAIL);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
|
||||
status);
|
||||
@@ -461,7 +461,7 @@ int volt_rail_sw_setup(struct gk20a *g)
|
||||
status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
|
||||
&g->perf_pmu.volt.volt_rail_metadata.volt_rails.super,
|
||||
volt, VOLT, volt_rail, VOLT_RAIL);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
|
||||
status);
|
||||
@@ -473,7 +473,7 @@ int volt_rail_sw_setup(struct gk20a *g)
|
||||
volt_rails.super),
|
||||
struct voltage_rail *, pvolt_rail, i) {
|
||||
status = volt_rail_state_init(g, pvolt_rail);
|
||||
if (status) {
|
||||
if (status != 0) {
|
||||
nvgpu_err(g,
|
||||
"Failure while executing RAIL's state init railIdx = %d",
|
||||
i);
|
||||
|
||||
@@ -80,7 +80,7 @@ struct voltage_rail_metadata {
|
||||
u8 volt_rail_vbios_volt_domain_convert_to_internal
|
||||
(struct gk20a *g, u8 vbios_volt_domain);
|
||||
|
||||
u32 volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
|
||||
int volt_rail_volt_dev_register(struct gk20a *g, struct voltage_rail
|
||||
*pvolt_rail, u8 volt_dev_idx, u8 operation_type);
|
||||
|
||||
u8 volt_rail_volt_domain_convert_to_idx(struct gk20a *g, u8 volt_domain);
|
||||
|
||||
Reference in New Issue
Block a user