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gpu: nvgpu: add ipa-pa cache for qnx

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This is adding ipa-pa cache for HV-qnx by making the code
as OS independant.

NVGPU-7329

Change-Id: If003ddf323124ba0899d7ead5db5c5478ddfc6e0
Signed-off-by: Dinesh T <dt@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2645771
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Dinesh T
2021-12-22 10:36:44 +00:00
committed by mobile promotions
parent d424598b7b
commit a47ce8eafe
5 changed files with 16 additions and 17 deletions
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5
drivers/gpu/nvgpu/common/init/nvgpu_init.c
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@@ -637,13 +637,12 @@ static int nvgpu_init_slcg_acb_load_gating_prod(struct gk20a *g)
return 0; return 0;
} }
#ifdef CONFIG_TEGRA_HV_MANAGER
static int nvgpu_ipa_pa_rwsem_init(struct gk20a *g) static int nvgpu_ipa_pa_rwsem_init(struct gk20a *g)
{ {
nvgpu_rwsem_init(&(g->ipa_pa_cache.ipa_pa_rw_lock)); nvgpu_rwsem_init(&(g->ipa_pa_cache.ipa_pa_rw_lock));
return 0; return 0;
} }
#endif
static int nvgpu_init_interrupt_setup(struct gk20a *g) static int nvgpu_init_interrupt_setup(struct gk20a *g)
{ {
/** /**
@@ -697,9 +696,7 @@ static int nvgpu_early_init(struct gk20a *g)
* prior to enabling interrupts for corresponding units. * prior to enabling interrupts for corresponding units.
*/ */
NVGPU_INIT_TABLE_ENTRY(g->ops.ecc.ecc_init_support, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(g->ops.ecc.ecc_init_support, NO_FLAG),
#ifdef CONFIG_TEGRA_HV_MANAGER
NVGPU_INIT_TABLE_ENTRY(&nvgpu_ipa_pa_rwsem_init, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(&nvgpu_ipa_pa_rwsem_init, NO_FLAG),
#endif
NVGPU_INIT_TABLE_ENTRY(&nvgpu_device_init, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(&nvgpu_device_init, NO_FLAG),
#ifdef CONFIG_NVGPU_DGPU #ifdef CONFIG_NVGPU_DGPU
NVGPU_INIT_TABLE_ENTRY(g->ops.bios.bios_sw_init, NO_FLAG), NVGPU_INIT_TABLE_ENTRY(g->ops.bios.bios_sw_init, NO_FLAG),

5
drivers/gpu/nvgpu/common/mm/ipa_pa_cache.c
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@@ -19,11 +19,9 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE. * DEALINGS IN THE SOFTWARE.
*/ */
#ifdef CONFIG_TEGRA_HV_MANAGER
#include <nvgpu/gk20a.h> #include <nvgpu/gk20a.h>
#include <nvgpu/timers.h> #include <nvgpu/timers.h>
#include <nvgpu/ipa_pa_cache.h> #include <nvgpu/ipa_pa_cache.h>
#include <soc/tegra/virt/syscalls.h>
static u64 nvgpu_ipa_to_pa_cache_lookup(struct gk20a *g, u64 ipa, static u64 nvgpu_ipa_to_pa_cache_lookup(struct gk20a *g, u64 ipa,
u64 *pa_len) u64 *pa_len)
@@ -65,7 +63,7 @@ u64 nvgpu_ipa_to_pa_cache_lookup_locked(struct gk20a *g, u64 ipa,
} }
void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, u64 pa, void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, u64 pa,
struct hyp_ipa_pa_info *info) struct nvgpu_hyp_ipa_pa_info *info)
{ {
struct nvgpu_ipa_pa_cache *ipa_cache; struct nvgpu_ipa_pa_cache *ipa_cache;
struct nvgpu_ipa_desc *desc = NULL; struct nvgpu_ipa_desc *desc = NULL;
@@ -96,4 +94,3 @@ void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, u64 pa,
nvgpu_rwsem_up_write(&(ipa_cache->ipa_pa_rw_lock)); nvgpu_rwsem_up_write(&(ipa_cache->ipa_pa_rw_lock));
} }
#endif

5
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
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@@ -146,9 +146,7 @@ enum nvgpu_profiler_pm_reservation_scope;
#include <nvgpu/semaphore.h> #include <nvgpu/semaphore.h>
#include <nvgpu/fifo.h> #include <nvgpu/fifo.h>
#include <nvgpu/sched.h> #include <nvgpu/sched.h>
#ifdef CONFIG_TEGRA_HV_MANAGER
#include <nvgpu/ipa_pa_cache.h> #include <nvgpu/ipa_pa_cache.h>
#endif
#include <nvgpu/mig.h> #include <nvgpu/mig.h>
#include <nvgpu/gpu_ops.h> #include <nvgpu/gpu_ops.h>
@@ -847,10 +845,9 @@ struct gk20a {
/** Pointer to struct storing CIC-RM's data */ /** Pointer to struct storing CIC-RM's data */
struct nvgpu_cic_rm *cic_rm; struct nvgpu_cic_rm *cic_rm;
#ifdef CONFIG_TEGRA_HV_MANAGER
/** Cache to store IPA to PA translations. */ /** Cache to store IPA to PA translations. */
struct nvgpu_ipa_pa_cache ipa_pa_cache; struct nvgpu_ipa_pa_cache ipa_pa_cache;
#endif
/** To enable emulate mode */ /** To enable emulate mode */
u32 emulate_mode; u32 emulate_mode;

11
drivers/gpu/nvgpu/include/nvgpu/ipa_pa_cache.h
View File

@@ -23,10 +23,14 @@
#ifndef NVGPU_IPAPACACHE_H #ifndef NVGPU_IPAPACACHE_H
#define NVGPU_IPAPACACHE_H #define NVGPU_IPAPACACHE_H
#ifdef CONFIG_TEGRA_HV_MANAGER
#include <nvgpu/rwsem.h> #include <nvgpu/rwsem.h>
struct hyp_ipa_pa_info; struct nvgpu_hyp_ipa_pa_info {
u64 base;
u64 offset;
u64 size;
};
struct gk20a; struct gk20a;
#define MAX_IPA_PA_CACHE 256U #define MAX_IPA_PA_CACHE 256U
@@ -47,6 +51,5 @@ u64 nvgpu_ipa_to_pa_cache_lookup_locked(struct gk20a *g, u64 ipa,
u64 *pa_len); u64 *pa_len);
void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa, void nvgpu_ipa_to_pa_add_to_cache(struct gk20a *g, u64 ipa,
u64 pa, struct hyp_ipa_pa_info *info); u64 pa, struct nvgpu_hyp_ipa_pa_info *info);
#endif
#endif /* NVGPU_IPAPACACHE_H */ #endif /* NVGPU_IPAPACACHE_H */

7
drivers/gpu/nvgpu/os/linux/soc.c
View File

@@ -71,6 +71,7 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
struct device *dev = dev_from_gk20a(g); struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = gk20a_get_platform(dev); struct gk20a_platform *platform = gk20a_get_platform(dev);
struct hyp_ipa_pa_info info; struct hyp_ipa_pa_info info;
struct nvgpu_hyp_ipa_pa_info nvgpu_ipapainfo;
int err; int err;
u64 pa = 0ULL; u64 pa = 0ULL;
@@ -100,7 +101,11 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
} }
if (pa != 0U) { if (pa != 0U) {
nvgpu_ipa_to_pa_add_to_cache(g, ipa, pa, &info); nvgpu_ipapainfo.base = info.base;
nvgpu_ipapainfo.offset = info.offset;
nvgpu_ipapainfo.size = info.size;
nvgpu_ipa_to_pa_add_to_cache(g, ipa, pa,
&nvgpu_ipapainfo);
} }
return pa; return pa;