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gpu: nvgpu: MISRA fixes for limit macros

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Limit macros from the C library's limits.h are not always in the desired
variable type. Cast these macros to the appropriate variable type to fix
MISRA violations.

JIRA NVGPU-3873

Change-Id: Ib06327aaa6cb78e4a5026b8fc4c15ce356140cc4
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2262186
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Adeel Raza
2019-12-13 14:46:30 -08:00
committed by Alex Waterman
parent f3421645b2
commit a4b8ec00b3
1 changed files with 12 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/gpu/nvgpu/include/nvgpu/static_analysis.h
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@@ -43,6 +43,11 @@
* @{
*/
static inline u32 nvgpu_safe_cast_s32_to_u32(s32 si_a);
static inline u64 nvgpu_safe_cast_s32_to_u64(s32 si_a);
static inline u64 nvgpu_safe_cast_s64_to_u64(s64 l_a);
static inline s64 nvgpu_safe_cast_u64_to_s64(u64 ul_a);
/**
* @brief Add two u32 values and check for overflow.
*
@@ -361,7 +366,7 @@ static inline u32 nvgpu_safe_cast_u64_to_u32(u64 ul_a)
*/
static inline u8 nvgpu_safe_cast_u64_to_u8(u64 ul_a)
{
if (ul_a > UCHAR_MAX) {
if (ul_a > nvgpu_safe_cast_s32_to_u64(UCHAR_MAX)) {
BUG();
} else {
return (u8)ul_a;
@@ -380,7 +385,7 @@ static inline u8 nvgpu_safe_cast_u64_to_u8(u64 ul_a)
*/
static inline u32 nvgpu_safe_cast_s64_to_u32(s64 l_a)
{
if ((l_a < 0) || (l_a > UINT_MAX)) {
if ((l_a < 0) || (l_a > nvgpu_safe_cast_u64_to_s64(U64(UINT_MAX)))) {
BUG();
} else {
return (u32)l_a;
@@ -507,7 +512,7 @@ static inline u16 nvgpu_safe_cast_u32_to_u16(u32 ui_a)
*/
static inline u8 nvgpu_safe_cast_u32_to_u8(u32 ui_a)
{
if (ui_a > UCHAR_MAX) {
if (ui_a > nvgpu_safe_cast_s32_to_u32(UCHAR_MAX)) {
BUG();
} else {
return (u8)ui_a;
@@ -526,7 +531,7 @@ static inline u8 nvgpu_safe_cast_u32_to_u8(u32 ui_a)
*/
static inline s8 nvgpu_safe_cast_u32_to_s8(u32 ui_a)
{
if (ui_a > SCHAR_MAX) {
if (ui_a > nvgpu_safe_cast_s32_to_u32(SCHAR_MAX)) {
BUG();
} else {
return (s8)ui_a;
@@ -545,7 +550,7 @@ static inline s8 nvgpu_safe_cast_u32_to_s8(u32 ui_a)
*/
static inline s32 nvgpu_safe_cast_u32_to_s32(u32 ui_a)
{
if (ui_a > INT_MAX) {
if (ui_a > nvgpu_safe_cast_s32_to_u32(INT_MAX)) {
BUG();
} else {
return (s32)ui_a;
@@ -564,7 +569,7 @@ static inline s32 nvgpu_safe_cast_u32_to_s32(u32 ui_a)
*/
static inline s32 nvgpu_safe_cast_u64_to_s32(u64 ul_a)
{
if (ul_a > INT_MAX) {
if (ul_a > nvgpu_safe_cast_s32_to_u64(INT_MAX)) {
BUG();
} else {
return (s32)ul_a;
@@ -584,7 +589,7 @@ static inline s32 nvgpu_safe_cast_u64_to_s32(u64 ul_a)
static inline s64 nvgpu_safe_cast_u64_to_s64(u64 ul_a)
{
NVGPU_COV_WHITELIST(false_positive, NVGPU_MISRA(Rule, 14_3), "Bug 2615925")
if (ul_a > LONG_MAX) {
if (ul_a > nvgpu_safe_cast_s64_to_u64(LONG_MAX)) {
BUG();
} else {
return (s64)ul_a;