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gpu: nvgpu: Refactor allocator lite unit

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- Changed the names of structs as per private/public
  naming convention.
- Renamed allocator.c file

NVGPU-4487

Change-Id: I42ec5730f1cb0029a6bb6e6ddff151bd08d6bbd8
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2316945
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
rmylavarapu
2020-03-23 15:43:58 +05:30
committed by Alex Waterman
parent f254a09094
commit a5b3170c6f
8 changed files with 22 additions and 22 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/nvgpu-common.yaml
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@@ -860,7 +860,7 @@ pmu:
safe: yes
owner: Sagar K
gpu: dgpu
sources: [ common/pmu/pmu_allocator.c,
sources: [ common/pmu/allocator.c,
include/nvgpu/pmu/allocator.h ]
mutex:

2
drivers/gpu/nvgpu/Makefile
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@@ -211,7 +211,7 @@ nvgpu-y += \
common/netlist/netlist.o \
common/init/nvgpu_init.o \
common/pmu/pmu.o \
common/pmu/pmu_allocator.o \
common/pmu/allocator.o \
common/pmu/pmu_mutex.o \
common/pmu/fw/fw.o \
common/pmu/fw/fw_ver_ops.o \

2
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -493,7 +493,7 @@ srcs += \
common/pmu/volt/volt_dev.c \
common/pmu/volt/volt_policy.c \
common/pmu/volt/volt_rail.c \
common/pmu/pmu_allocator.c \
common/pmu/allocator.c \
common/pmu/pmu_debug.c \
common/pmu/pmu_mutex.c \
common/pmu/pmu_pstate.c \

14
drivers/gpu/nvgpu/common/pmu/pmu_allocator.c → drivers/gpu/nvgpu/common/pmu/allocator.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -27,7 +27,7 @@
#include <nvgpu/pmu/fw.h>
#include <nvgpu/dma.h>
void nvgpu_pmu_dmem_allocator_init(struct gk20a *g,
void nvgpu_pmu_allocator_dmem_init(struct gk20a *g,
struct nvgpu_pmu *pmu, struct nvgpu_allocator *dmem,
union pmu_init_msg_pmu *init)
{
@@ -49,21 +49,21 @@ void nvgpu_pmu_dmem_allocator_init(struct gk20a *g,
}
}
void nvgpu_pmu_dmem_allocator_destroy(struct nvgpu_allocator *dmem)
void nvgpu_pmu_allocator_dmem_destroy(struct nvgpu_allocator *dmem)
{
if (nvgpu_alloc_initialized(dmem)) {
nvgpu_alloc_destroy(dmem);
}
}
void nvgpu_pmu_surface_free(struct gk20a *g, struct nvgpu_mem *mem)
void nvgpu_pmu_allocator_surface_free(struct gk20a *g, struct nvgpu_mem *mem)
{
if (nvgpu_mem_is_valid(mem)) {
nvgpu_dma_free(g, mem);
}
}
void nvgpu_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
void nvgpu_pmu_allocator_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
struct flcn_mem_desc_v0 *fb)
{
fb->address.lo = u64_lo32(mem->gpu_va);
@@ -72,8 +72,8 @@ void nvgpu_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
fb->params |= (GK20A_PMU_DMAIDX_VIRT << 24U);
}
int nvgpu_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
u32 size)
int nvgpu_pmu_allocator_sysmem_surface_alloc(struct gk20a *g,
struct nvgpu_mem *mem, u32 size)
{
struct mm_gk20a *mm = &g->mm;
struct vm_gk20a *vm = mm->pmu.vm;

4
drivers/gpu/nvgpu/common/pmu/boardobj/boardobjgrp.c
View File

@@ -236,7 +236,7 @@ static int pmu_cmd_destroy_impl(struct gk20a *g,
{
struct nvgpu_mem *mem = &cmd->surf.sysmem_desc;
nvgpu_pmu_surface_free(g, mem);
nvgpu_pmu_allocator_surface_free(g, mem);
return 0;
}
@@ -327,7 +327,7 @@ static int pmu_cmd_pmu_init_handle_impl(struct gk20a *g,
goto pmu_cmd_pmu_init_handle_impl_exit;
}
status = nvgpu_pmu_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize);
status = nvgpu_pmu_allocator_sysmem_surface_alloc(g, sysmem_desc, pcmd->fbsize);
if (status != 0) {
nvgpu_err(g, "failed to allocate memory\n");
return -ENOMEM;

4
drivers/gpu/nvgpu/common/pmu/fw/fw_ver_ops.c
View File

@@ -141,7 +141,7 @@ static void pmu_set_cmd_line_args_trace_dma_base_v5(struct nvgpu_pmu *pmu)
{
struct gk20a *g = pmu->g;
nvgpu_pmu_surface_describe(g, &pmu->trace_buf,
nvgpu_pmu_allocator_surface_describe(g, &pmu->trace_buf,
&pmu->fw->args_v5.trace_buf);
}
@@ -150,7 +150,7 @@ static void config_cmd_line_args_super_surface_v6(struct nvgpu_pmu *pmu)
struct gk20a *g = pmu->g;
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_PMU_SUPER_SURFACE)) {
nvgpu_pmu_surface_describe(g,
nvgpu_pmu_allocator_surface_describe(g,
nvgpu_pmu_super_surface_mem(g, pmu, pmu->super_surface),
&pmu->fw->args_v6.super_surface);
}

2
drivers/gpu/nvgpu/common/pmu/ipc/pmu_msg.c
View File

@@ -466,7 +466,7 @@ static int pmu_process_init_msg(struct nvgpu_pmu *pmu,
goto exit;
}
nvgpu_pmu_dmem_allocator_init(g, pmu, &pmu->dmem, init);
nvgpu_pmu_allocator_dmem_init(g, pmu, &pmu->dmem, init);
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_PMU_SUPER_SURFACE)) {
nvgpu_pmu_ss_create_ssmd_lookup_table(g,

14
drivers/gpu/nvgpu/include/nvgpu/pmu/allocator.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -32,14 +32,14 @@ struct nvgpu_allocator;
union pmu_init_msg_pmu;
struct flcn_mem_desc_v0;
void nvgpu_pmu_dmem_allocator_init(struct gk20a *g,
void nvgpu_pmu_allocator_dmem_init(struct gk20a *g,
struct nvgpu_pmu *pmu, struct nvgpu_allocator *dmem,
union pmu_init_msg_pmu *init);
void nvgpu_pmu_dmem_allocator_destroy(struct nvgpu_allocator *dmem);
void nvgpu_pmu_allocator_dmem_destroy(struct nvgpu_allocator *dmem);
void nvgpu_pmu_surface_free(struct gk20a *g, struct nvgpu_mem *mem);
void nvgpu_pmu_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
void nvgpu_pmu_allocator_surface_free(struct gk20a *g, struct nvgpu_mem *mem);
void nvgpu_pmu_allocator_surface_describe(struct gk20a *g, struct nvgpu_mem *mem,
struct flcn_mem_desc_v0 *fb);
int nvgpu_pmu_sysmem_surface_alloc(struct gk20a *g, struct nvgpu_mem *mem,
u32 size);
int nvgpu_pmu_allocator_sysmem_surface_alloc(struct gk20a *g,
struct nvgpu_mem *mem, u32 size);
#endif /* NVGPU_PMU_ALLOCATOR_H */