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gpu: nvgpu: Update __get_pte_size() to check IOMMU-ability

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When generating the PTE size for a given mapping the code must
consider whether the GPU is being IOMMU'ed. The presence and
usage of an IOMMU implies the buffers will appear contiguous
to the GPU. Without an IOMMU we cannot assume that and therefor
must use small pages regardless of the size of the buffer to
be mapped.

Bug 2011640

Change-Id: I6c64cbcd8844a7ed855116754b795d949a3003af
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1697891
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2018-04-18 21:14:50 +01:00
committed by mobile promotions
parent 2bc421dd52
commit a6e3403f46
1 changed files with 6 additions and 2 deletions
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8
drivers/gpu/nvgpu/common/mm/mm.c
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@@ -77,10 +77,13 @@ static enum gmmu_pgsz_gk20a __get_pte_size_split_addr(struct vm_gk20a *vm,
* - Attempt to find a reserved memory area and use the page size
* based on that.
* - If no reserved page size is available, default to small pages.
* o If the base is zero:
* o If the base is zero and we have an SMMU:
* - If the size is larger than or equal to the big page size, use big
* pages.
* - Otherwise use small pages.
* o If there's no SMMU:
* - Regardless of buffer size use small pages since we have no
* - guarantee of contiguity.
*/
enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size)
{
@@ -95,7 +98,8 @@ enum gmmu_pgsz_gk20a __get_pte_size(struct vm_gk20a *vm, u64 base, u64 size)
if (base)
return __get_pte_size_fixed_map(vm, base, size);
if (size >= vm->gmmu_page_sizes[gmmu_page_size_big])
if (size >= vm->gmmu_page_sizes[gmmu_page_size_big] &&
nvgpu_iommuable(g))
return gmmu_page_size_big;
return gmmu_page_size_small;
}