gpu: nvgpu: nvgpu_pmu_disable_elpg() status check

- Added status check for nvgpu_pmu_disable_elpg() return value
 & prints error information upon failure.
- Below CID's are due to missing status check of function
 nvgpu_pmu_disable_elpg() return value, so this CL helps to fix it
 2624546
 2624547
 2624548

Bug 200291879

Change-Id: I263fc6bc9e2667af478bfd7160fe205167556f99
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1565998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2017-09-22 11:16:14 +05:30
committed by mobile promotions
parent 20b746b485
commit adf4b33c3b
2 changed files with 10 additions and 5 deletions

View File

@@ -499,7 +499,8 @@ int nvgpu_pmu_destroy(struct gk20a *g)
nvgpu_pmu_get_pg_stats(g,
PMU_PG_ELPG_ENGINE_ID_GRAPHICS, &pg_stat_data);
nvgpu_pmu_disable_elpg(g);
if (nvgpu_pmu_disable_elpg(g))
nvgpu_err(g, "failed to set disable elpg");
pmu->initialized = false;
/* update the s/w ELPG residency counters */

View File

@@ -1209,8 +1209,10 @@ void gk20a_fifo_reset_engine(struct gk20a *g, u32 engine_id)
nvgpu_err(g, "unsupported engine_id %d", engine_id);
if (engine_enum == ENGINE_GR_GK20A) {
if (g->support_pmu && g->can_elpg)
nvgpu_pmu_disable_elpg(g);
if (g->support_pmu && g->can_elpg) {
if (nvgpu_pmu_disable_elpg(g))
nvgpu_err(g, "failed to set disable elpg");
}
/* resetting engine will alter read/write index.
* need to flush circular buffer before re-enabling FECS.
*/
@@ -1457,8 +1459,10 @@ static bool gk20a_fifo_handle_mmu_fault(
g->fifo.deferred_reset_pending = false;
/* Disable power management */
if (g->support_pmu && g->can_elpg)
nvgpu_pmu_disable_elpg(g);
if (g->support_pmu && g->can_elpg) {
if (nvgpu_pmu_disable_elpg(g))
nvgpu_err(g, "failed to set disable elpg");
}
if (g->ops.clock_gating.slcg_gr_load_gating_prod)
g->ops.clock_gating.slcg_gr_load_gating_prod(g,
false);