gpu: nvgpu: Add documentation for qnx OS-Utils unit

Add doxygen style documentation for qnx OS-Utils unit's header files.
Some header files are present here but definition is in qnx/src repo.

Jira NVGPU-3759

Change-Id: I119c02067e99e3b161a06ec006c3bf70e3abc433
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152148
GVS: Gerrit_Virtual_Submit
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Shashank Singh
2019-07-12 10:18:51 +05:30
committed by Alex Waterman
parent 1c1fd99faf
commit ae29918c3e
3 changed files with 91 additions and 0 deletions

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@@ -40,6 +40,7 @@
* - @ref unit-sdl
* - @ref unit-init
* - @ref unit-falcon
* - @ref unit-os_utils
* - Etc, etc.
*
* NVGPU Software Unit Design Documentation

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@@ -35,9 +35,36 @@
struct gk20a;
/**
* @brief Write a value to an already mapped io-region.
*
* @param g[in] GPU super structure.
* @param r[in] Register offset in io-region.
* @param v[in] Value to write at the offset.
*
* @return None.
*/
void nvgpu_writel(struct gk20a *g, u32 r, u32 v);
void nvgpu_writel_relaxed(struct gk20a *g, u32 r, u32 v);
/**
* @brief Read a value from an already mapped io-region.
*
* @param g[in] GPU super structure.
* @param r[in] Register offset in io-region.
*
* @return Value at the given offset of the io-region.
*/
u32 nvgpu_readl(struct gk20a *g, u32 r);
/**
* @brief Read a value from an already mapped io-region.
*
* @param g[in] GPU super structure.
* @param r[in] Register offset in io-region.
*
* @return Value at the given offset of the io-region.
*/
u32 nvgpu_readl_impl(struct gk20a *g, u32 r);
void nvgpu_writel_check(struct gk20a *g, u32 r, u32 v);
void nvgpu_writel_loop(struct gk20a *g, u32 r, u32 v);

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@@ -26,13 +26,76 @@
struct gk20a;
/**
* @brief Check whether running on silicon or not.
*
* @param g[in] GPU super structure.
*
* @return Returns true if it's silicon else return false.
*/
bool nvgpu_platform_is_silicon(struct gk20a *g);
/**
* @brief Check whether running simulation or not.
*
* @param g[in] GPU super structure.
*
* @return Returns true if it's simulation else returns false.
*/
bool nvgpu_platform_is_simulation(struct gk20a *g);
/**
* @brief Check whether running fpga or not.
*
* @param g[in] GPU super structure.
*
* @return Returns true if it's fpga else returns false.
*/
bool nvgpu_platform_is_fpga(struct gk20a *g);
/**
* @brief Check whether running in virtualized environment.
*
* @param g[in] GPU super structure.
*
* @return Returns true if it's virtualized environment else returns false.
*/
bool nvgpu_is_hypervisor_mode(struct gk20a *g);
/**
* @brief Check whether bpmp server is runing.
*
* @param g[in] GPU super structure.
*
* @return Returns true if bpmp server is running else returns false.
*/
bool nvgpu_is_bpmp_running(struct gk20a *g);
/**
* @brief Check whether soc is t194 and revision a01.
*
* @param g[in] GPU super structure.
*
* @return Returns true if soc is t194-a01 else returns false.
*/
bool nvgpu_is_soc_t194_a01(struct gk20a *g);
/**
* @brief Do soc related init
*
* @param g[in] GPU super structure.
*
* @return Returns 0 on success or in case of failure, a suitable error code.
*/
int nvgpu_init_soc_vars(struct gk20a *g);
/**
* @brief OS specific implementation to provide precise microsecond delay
*
* @param usecs[in] Delay in microseconds.
*
* @return None.
*/
void nvgpu_delay_usecs(unsigned int usecs);
u64 nvgpu_us_counter(void);
u64 nvgpu_get_cycles(void);