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synced 2025-12-24 10:34:43 +03:00
gpu: nvgpu: Add multi GR gr_config utilty support
This CL covers the following code changes, 1) Added api to get the gr_config per gr_instance_id basis. 2) Added api to covert from gpu_instance_id to gr_instance_id. 3) Modified nvgpu_gr_exec_with_ret_for_instance() utility to handle generic data return type. JIRA NVGPU-5662 JIRA NVGPU-5663 Change-Id: I4ab732e15cdbda25672975f99e23b5e5d27decb0 Signed-off-by: Lakshmanan M <lm@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2413195 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
committed by
Alex Waterman
parent
ebb66b5d50
commit
aef3367ca5
@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -46,6 +46,12 @@ struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g)
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return gr->config;
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}
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struct nvgpu_gr_config *nvgpu_gr_get_gr_instance_config_ptr(struct gk20a *g,
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u32 gr_instance_id)
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{
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return g->gr[gr_instance_id].config;
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}
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struct nvgpu_gr_intr *nvgpu_gr_get_intr_ptr(struct gk20a *g)
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{
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struct nvgpu_gr *gr = nvgpu_gr_get_cur_instance_ptr(g);
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@@ -262,7 +262,7 @@ static inline u32 nvgpu_grmgr_get_gpu_instance_id(struct gk20a *g,
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if (gpu_instance_id >= g->mig.num_gpu_instances) {
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nvgpu_err(g,
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"gpu_instance_id[%u] > num_gpu_instances[%u]",
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"gpu_instance_id[%u] >= num_gpu_instances[%u]",
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gpu_instance_id, g->mig.num_gpu_instances);
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nvgpu_assert(
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gpu_instance_id < g->mig.num_gpu_instances);
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@@ -314,3 +314,29 @@ u32 nvgpu_grmgr_get_gr_gpc_phys_id(struct gk20a *g, u32 gr_instance_id, u32 gpc_
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return gr_syspipe->gpcs[gpc_local_id].physical_id;
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}
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u32 nvgpu_grmgr_get_gr_instance_id(struct gk20a *g, u32 gpu_instance_id)
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{
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u32 gr_instance_id = 0U;
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/* TODO : Add gr_instance_id for physical device when MIG is enabled. */
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if ((nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) &&
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(gpu_instance_id != 0U)) {
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if (gpu_instance_id < g->mig.num_gpu_instances) {
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/* 0th entry is physical device gpu instance */
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gr_instance_id = nvgpu_safe_sub_u32(
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gpu_instance_id, 1U);
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} else {
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nvgpu_err(g,
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"gpu_instance_id[%u] >= num_gpu_instances[%u]",
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gpu_instance_id, g->mig.num_gpu_instances);
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nvgpu_assert(
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gpu_instance_id < g->mig.num_gpu_instances);
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}
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}
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nvgpu_log(g, gpu_dbg_mig, "gpu_instance_id[%u] gr_instance_id[%u]",
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gpu_instance_id, gr_instance_id);
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return gr_instance_id;
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}
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@@ -116,11 +116,14 @@
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#define nvgpu_gr_exec_for_instance(g, gr_instance_id, func) \
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({ \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, gr_instance_id); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, true); \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, \
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gr_instance_id); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, \
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true); \
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g->mig.cur_gr_instance = gr_instance_id; \
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(func); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, false); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, \
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false); \
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} else { \
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(func); \
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} \
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@@ -130,22 +133,61 @@
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#endif
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, func) \
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#define nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, func, type) \
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({ \
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int err = 0; \
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typeof(type) ret; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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u32 gr_syspipe_id = nvgpu_gr_get_syspipe_id(g, gr_instance_id); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, true); \
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g->mig.cur_gr_instance = gr_instance_id; \
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err = (func); \
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ret = (func); \
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nvgpu_grmgr_config_gr_remap_window(g, gr_syspipe_id, false); \
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} else { \
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err = (func); \
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ret = (func); \
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} \
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ret; \
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})
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#else
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#define nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, func, type) \
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(func)
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#endif
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id, func) \
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({ \
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int err; \
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err = nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, \
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func, err); \
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err; \
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})
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#else
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#define nvgpu_gr_exec_with_ret_for_instance(g, gr_instance_id, func) (func)
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#define nvgpu_gr_exec_with_err_for_instance(g, gr_instance_id, func) (func)
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#endif
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#ifdef CONFIG_NVGPU_MIG
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#define nvgpu_gr_get_gpu_instance_config_ptr(g, gpu_instance_id) \
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({ \
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struct nvgpu_gr_config *gr_config = NULL; \
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_MIG)) { \
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u32 gr_instance_id = nvgpu_grmgr_get_gr_instance_id(g, \
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gpu_instance_id); \
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if (gr_instance_id < g->num_gr_instances) { \
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gr_config = \
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nvgpu_gr_get_gr_instance_config_ptr(g, \
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gr_instance_id); \
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} \
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} else { \
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gr_config = nvgpu_gr_get_config_ptr(g); \
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} \
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gr_config; \
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})
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#else
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#define nvgpu_gr_get_gpu_instance_config_ptr(g, gr_instance_id) \
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({ \
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struct nvgpu_gr_config *gr_instance_gr_config = \
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nvgpu_gr_get_config_ptr(g); \
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gr_instance_gr_config; \
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})
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#endif
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#endif /* NVGPU_GR_INSTANCES_H */
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -86,6 +86,19 @@ struct nvgpu_gr_falcon *nvgpu_gr_get_falcon_ptr(struct gk20a *g);
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*/
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struct nvgpu_gr_config *nvgpu_gr_get_config_ptr(struct gk20a *g);
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/**
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* @brief Get GR configuration struct pointer.
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*
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* @param g [in] Pointer to GPU driver struct.
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* @param gr_instance_id [in] Gr instance Id.
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*
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* This function returns pointer to #nvgpu_gr_config structure.
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*
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* @return Pointer to GR configuration struct.
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*/
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struct nvgpu_gr_config *nvgpu_gr_get_gr_instance_config_ptr(struct gk20a *g,
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u32 gr_instance_id);
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/**
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* @brief Get GR interrupt data struct pointer.
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*
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@@ -38,6 +38,7 @@ u32 nvgpu_grmgr_get_num_gr_instances(struct gk20a *g);
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u32 nvgpu_grmgr_get_gr_syspipe_id(struct gk20a *g, u32 gr_instance_id);
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u32 nvgpu_grmgr_get_gr_num_gpcs(struct gk20a *g, u32 gr_instance_id);
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u32 nvgpu_grmgr_get_gr_gpc_phys_id(struct gk20a *g, u32 gr_instance_id, u32 gpc_local_id);
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u32 nvgpu_grmgr_get_gr_instance_id(struct gk20a *g, u32 gpu_instance_id);
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static inline bool nvgpu_grmgr_is_mig_type_gpu_instance(
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struct nvgpu_gpu_instance *gpu_instance)
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