gpu: nvgpu: runlist MISRA fixes for Rule 10.4

Fixed essential type for flags argument (0ULL) passed to
nvgpu_dma_alloc_flags_sys.

Jira NVGPU-3379

Change-Id: I3ab97d98b19bf168ba7a1c2a9357e778b1a242d5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109681
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Tested-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-05-01 14:11:52 -07:00
committed by mobile promotions
parent c5f873fa31
commit af84bdaae8

View File

@@ -754,7 +754,7 @@ int nvgpu_runlist_setup_sw(struct gk20a *g)
for (j = 0; j < MAX_RUNLIST_BUFFERS; j++) {
err = nvgpu_dma_alloc_flags_sys(g,
g->is_virtual ?
0 : NVGPU_DMA_PHYSICALLY_ADDRESSED,
0ULL : NVGPU_DMA_PHYSICALLY_ADDRESSED,
runlist_size,
&runlist->mem[j]);
if (err != 0) {