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gpu: nvgpu: gv11b: Reorg gr_ctx HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the gr_ctx sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: Icc6b0f968f2e3209de190d445c878a4b20bfcf4a Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1527418 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -2,7 +2,7 @@
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*
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* GV11B Graphics Context
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*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -22,7 +22,7 @@
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#include "gr_ctx_gv11b.h"
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static int gr_gv11b_get_netlist_name(struct gk20a *g, int index, char *name)
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int gr_gv11b_get_netlist_name(struct gk20a *g, int index, char *name)
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{
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switch (index) {
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#ifdef GV11B_NETLIST_IMAGE_FW_NAME
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@@ -57,7 +57,7 @@ static int gr_gv11b_get_netlist_name(struct gk20a *g, int index, char *name)
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return -1;
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}
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static bool gr_gv11b_is_firmware_defined(void)
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bool gr_gv11b_is_firmware_defined(void)
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{
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#ifdef GV11B_NETLIST_IMAGE_FW_NAME
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return true;
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@@ -65,9 +65,3 @@ static bool gr_gv11b_is_firmware_defined(void)
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return false;
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#endif
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}
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void gv11b_init_gr_ctx(struct gpu_ops *gops) {
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gops->gr_ctx.get_netlist_name = gr_gv11b_get_netlist_name;
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gops->gr_ctx.is_fw_defined = gr_gv11b_is_firmware_defined;
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gops->gr_ctx.use_dma_for_fw_bootstrap = false;
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}
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@@ -25,6 +25,7 @@
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* Define netlist for silicon only
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* #define GV11B_NETLIST_IMAGE_FW_NAME GK20A_NETLIST_IMAGE_A
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*/
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void gv11b_init_gr_ctx(struct gpu_ops *gops);
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int gr_gv11b_get_netlist_name(struct gk20a *g, int index, char *name);
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bool gr_gv11b_is_firmware_defined(void);
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#endif /*__GR_CTX_GV11B_H__*/
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@@ -282,6 +282,10 @@ static const struct gpu_ops gv11b_ops = {
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.preempt_ch_tsg = gv11b_fifo_preempt_ch_tsg,
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.handle_ctxsw_timeout = gv11b_fifo_handle_ctxsw_timeout,
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},
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.gr_ctx = {
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.get_netlist_name = gr_gv11b_get_netlist_name,
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.is_fw_defined = gr_gv11b_is_firmware_defined,
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},
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.mc = {
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.intr_enable = mc_gv11b_intr_enable,
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.intr_unit_config = mc_gp10b_intr_unit_config,
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@@ -349,6 +353,7 @@ int gv11b_init_hal(struct gk20a *g)
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gops->ce2 = gv11b_ops.ce2;
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gops->clock_gating = gv11b_ops.clock_gating;
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gops->fifo = gv11b_ops.fifo;
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gops->gr_ctx = gv11b_ops.gr_ctx;
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gops->mc = gv11b_ops.mc;
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gops->debug = gv11b_ops.debug;
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gops->dbg_session_ops = gv11b_ops.dbg_session_ops;
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@@ -365,13 +370,13 @@ int gv11b_init_hal(struct gk20a *g)
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gops->get_litter_value = gv11b_ops.get_litter_value;
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/* boot in non-secure modes for time beeing */
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__nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, false);
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__nvgpu_set_enabled(g, NVGPU_SEC_PRIVSECURITY, false);
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__nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false);
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gv11b_init_gr(g);
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gv11b_init_fecs_trace_ops(gops);
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gv11b_init_fb(gops);
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gv11b_init_gr_ctx(gops);
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gv11b_init_mm(gops);
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gv11b_init_pmu_ops(g);
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gv11b_init_regops(gops);
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