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gpu: nvgpu: Fix MISRA violations in PMU unit

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Fix MISRA 8.6 violations in the PMU unit in
following files:
hal/pmu/pmu_gv11b.h

JIRA NVGPU-3885

Change-Id: Ie97e6e78591e72a75ee5bad411ef76943b622917
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2169140
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Divya Singhatwaria
2019-08-06 14:57:54 +05:30
committed by mobile promotions
parent ba9a383ca3
commit b1175cba64
1 changed files with 4 additions and 0 deletions
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4
drivers/gpu/nvgpu/hal/pmu/pmu_gv11b.h
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@@ -58,8 +58,12 @@ void gv11b_clear_pmu_bar0_host_err_status(struct gk20a *g);
int gv11b_pmu_bar0_error_status(struct gk20a *g, u32 *bar0_status,
u32 *etype);
bool gv11b_pmu_validate_mem_integrity(struct gk20a *g);
#ifdef CONFIG_NVGPU_INJECT_HWERR
struct nvgpu_hw_err_inject_info_desc * gv11b_pmu_intr_get_err_desc(struct gk20a *g);
int gv11b_pmu_inject_ecc_error(struct gk20a *g,
struct nvgpu_hw_err_inject_info *err, u32 error_info);
#endif /* CONFIG_NVGPU_INJECT_HWERR */
#endif /* PMU_GV11B_H */