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gpu: nvgpu: ga10b fix zcull sm_num_rcp_conservative

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-calculate sm_num_rcp_conservative correctly using TPC total from all GPCs
-register manual says use SM count but it's actually TPC count

bug 3370219

Change-Id: I4422fb09d3a59879394e0e1abc5513efc6355b5b
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2586399
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Gangzheng Tong <gtong@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: Gangzheng Tong <gtong@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
David Li
2021-08-31 01:29:24 -07:00
committed by mobile promotions
parent a53ebf02d1
commit b27524916a
1 changed files with 5 additions and 3 deletions
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8
drivers/gpu/nvgpu/hal/gr/zcull/zcull_gm20b.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -70,9 +70,11 @@ int gm20b_gr_init_zcull_hw(struct gk20a *g,
}
}
/* ceil(1.0f / SM_NUM * gr_gpc0_zcull_sm_num_rcp_conservative__max_v()) */
/* ceil(1.0f / SM_NUM * gr_gpc0_zcull_sm_num_rcp_conservative__max_v())
* sm_num in the register manual actually means TPC count
*/
rcp_conserv = DIV_ROUND_UP(gr_gpc0_zcull_sm_num_rcp_conservative__max_v(),
nvgpu_gr_config_get_gpc_tpc_count(gr_config, 0U));
nvgpu_gr_config_get_tpc_count(gr_config));
for (gpc_index = 0;
gpc_index < nvgpu_gr_config_get_gpc_count(gr_config);