gpu: nvgpu: Disable Freq_domain obj support for tu10a

Disabled freq_domain obj support for tu10a profile as it is not
a POR for auto profile.

NVGPU-3812

Change-Id: I818d4cddbe59432c54a6ee539dcb136b43fae9e8
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2153115
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
rmylavarapu
2019-07-15 10:03:29 +05:30
committed by mobile promotions
parent 7c2528e04d
commit b4b5fd9029
2 changed files with 4 additions and 6 deletions

View File

@@ -412,11 +412,9 @@ static int pmu_pstate_clk_pmu_setup(struct gk20a *g)
return err;
}
if (g->ops.clk.support_clk_freq_domain) {
err = nvgpu_clk_pmu_clk_domains_load(g);
if (err != 0) {
return err;
}
err = nvgpu_clk_pmu_clk_domains_load(g);
if (err != 0) {
return err;
}
return 0;

View File

@@ -1551,7 +1551,7 @@ int tu104_init_hal(struct gk20a *g)
gops->clk.support_clk_freq_controller = false;
gops->clk.support_pmgr_domain = false;
gops->clk.support_lpwr_pg = false;
gops->clk.support_clk_freq_domain = true;
gops->clk.support_clk_freq_domain = false;
gops->pmu_perf.support_changeseq = true;
gops->pmu_perf.support_vfe = true;
gops->clk.support_vf_point = true;