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gpu: nvgpu: execute CTXSW ucode initialization per GR instance
Move CTXSW ucode initialization to separate static API gr_init_ctxsw_falcon_support() and execute this per GR instance with nvgpu_gr_exec_with_ret_for_each_instance() Jira NVGPU-5648 Change-Id: I6e0fa72bd568eaac027bb12edcdf90255336f0a1 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2409532 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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committed by
Alex Waterman
parent
43242fa878
commit
b6c72410bb
@@ -760,6 +760,20 @@ static int gr_init_sm_id_config_early(struct gk20a *g)
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}
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#endif
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static int gr_init_ctxsw_falcon_support(struct gk20a *g)
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{
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struct nvgpu_gr *gr = &g->gr[g->mig.cur_gr_instance];
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int err;
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err = nvgpu_gr_falcon_init_ctxsw(g, gr->falcon);
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if (err != 0) {
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gr_intr_report_ctxsw_error(g, GPU_FECS_CTXSW_INIT_ERROR, 0, 0);
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return err;
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}
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return 0;
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}
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int nvgpu_gr_init_support(struct gk20a *g)
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{
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int err = 0;
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@@ -788,9 +802,9 @@ int nvgpu_gr_init_support(struct gk20a *g)
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}
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#endif
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err = nvgpu_gr_falcon_init_ctxsw(g, g->gr->falcon);
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err = nvgpu_gr_exec_with_ret_for_each_instance(g,
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gr_init_ctxsw_falcon_support(g));
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if (err != 0) {
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gr_intr_report_ctxsw_error(g, GPU_FECS_CTXSW_INIT_ERROR, 0, 0);
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return err;
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}
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