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gpu: nvgpu: add and update falcon_dump_stats
Add dump_falcon_info to avoid the duplication of entire falcon_dump_stats function for new chips. JIRA NVGPU-9216 Change-Id: I0a0c7b4655c625222a8fd3538d9e855568616e3a Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2858843 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Seema Khowala <seemaj@nvidia.com> Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@@ -86,6 +86,7 @@ void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn);
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void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn);
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void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn);
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#endif
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#endif
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@@ -600,6 +600,18 @@ void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn)
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nvgpu_falcon_readl(flcn, falcon_falcon_curctx_r()));
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nvgpu_falcon_readl(flcn, falcon_falcon_curctx_r()));
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nvgpu_err(g, "falcon_falcon_nxtctx_r : 0x%x",
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nvgpu_err(g, "falcon_falcon_nxtctx_r : 0x%x",
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nvgpu_falcon_readl(flcn, falcon_falcon_nxtctx_r()));
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nvgpu_falcon_readl(flcn, falcon_falcon_nxtctx_r()));
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if (g->ops.falcon.dump_falcon_info != NULL) {
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g->ops.falcon.dump_falcon_info(flcn);
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}
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}
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void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn)
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{
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struct gk20a *g = NULL;
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g = flcn->g;
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/*
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/*
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* Common Falcon code accesses each engine's falcon registers
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* Common Falcon code accesses each engine's falcon registers
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* using engine's falcon base address + offset.
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* using engine's falcon base address + offset.
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@@ -1644,6 +1644,7 @@ static const struct gops_falcon ga100_ops_falcon = {
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.set_irq = gk20a_falcon_set_irq,
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.set_irq = gk20a_falcon_set_irq,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_info = gk20a_falcon_dump_info,
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#endif
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#endif
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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@@ -1656,6 +1656,7 @@ static const struct gops_falcon ga10b_ops_falcon = {
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.set_irq = gk20a_falcon_set_irq,
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.set_irq = gk20a_falcon_set_irq,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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.dump_falcon_stats = ga10b_falcon_dump_stats,
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.dump_falcon_stats = ga10b_falcon_dump_stats,
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.dump_falcon_info = gk20a_falcon_dump_info,
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#endif
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#endif
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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.copy_from_dmem = gk20a_falcon_copy_from_dmem,
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.copy_from_dmem = gk20a_falcon_copy_from_dmem,
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@@ -1,7 +1,7 @@
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/*
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/*
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* GM20B Graphics
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* GM20B Graphics
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*
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*
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* Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@@ -1023,6 +1023,7 @@ static const struct gops_falcon gm20b_ops_falcon = {
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.mailbox_write = gk20a_falcon_mailbox_write,
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.mailbox_write = gk20a_falcon_mailbox_write,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_info = gk20a_falcon_dump_info,
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#endif
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#endif
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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@@ -1422,6 +1422,7 @@ static const struct gops_falcon gv11b_ops_falcon = {
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.set_irq = gk20a_falcon_set_irq,
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.set_irq = gk20a_falcon_set_irq,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_info = gk20a_falcon_dump_info,
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#endif
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#endif
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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@@ -1513,6 +1513,7 @@ static const struct gops_falcon tu104_ops_falcon = {
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.set_irq = gk20a_falcon_set_irq,
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.set_irq = gk20a_falcon_set_irq,
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_stats = gk20a_falcon_dump_stats,
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.dump_falcon_info = gk20a_falcon_dump_info,
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#endif
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#endif
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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@@ -1,5 +1,5 @@
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/*
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/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
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*
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* copy of this software and associated documentation files (the "Software"),
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@@ -70,6 +70,7 @@ struct gops_falcon {
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u32 intr_mask, u32 intr_dest);
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u32 intr_mask, u32 intr_dest);
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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void (*dump_falcon_stats)(struct nvgpu_falcon *flcn);
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void (*dump_falcon_stats)(struct nvgpu_falcon *flcn);
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void (*dump_falcon_info)(struct nvgpu_falcon *flcn);
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#endif
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#endif
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
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int (*copy_from_dmem)(struct nvgpu_falcon *flcn,
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int (*copy_from_dmem)(struct nvgpu_falcon *flcn,
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