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gpu: nvgpu: add and update falcon_dump_stats

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Add dump_falcon_info to avoid the duplication of entire
falcon_dump_stats function for new chips.

JIRA NVGPU-9216

Change-Id: I0a0c7b4655c625222a8fd3538d9e855568616e3a
Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2858843
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Rajesh Devaraj
2023-02-15 17:54:51 +00:00
committed by mobile promotions
parent d6be1bdcfe
commit b754a2f0cf
8 changed files with 23 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/hal/falcon/falcon_gk20a.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -86,6 +86,7 @@ void gk20a_falcon_set_irq(struct nvgpu_falcon *flcn, bool enable,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn);
void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn);
#endif
#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)

14
drivers/gpu/nvgpu/hal/falcon/falcon_gk20a_fusa.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -600,6 +600,18 @@ void gk20a_falcon_dump_stats(struct nvgpu_falcon *flcn)
nvgpu_falcon_readl(flcn, falcon_falcon_curctx_r()));
nvgpu_err(g, "falcon_falcon_nxtctx_r : 0x%x",
nvgpu_falcon_readl(flcn, falcon_falcon_nxtctx_r()));
if (g->ops.falcon.dump_falcon_info != NULL) {
g->ops.falcon.dump_falcon_info(flcn);
}
}
void gk20a_falcon_dump_info(struct nvgpu_falcon *flcn)
{
struct gk20a *g = NULL;
g = flcn->g;
/*
* Common Falcon code accesses each engine's falcon registers
* using engine's falcon base address + offset.

1
drivers/gpu/nvgpu/hal/init/hal_ga100.c
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@@ -1644,6 +1644,7 @@ static const struct gops_falcon ga100_ops_falcon = {
.set_irq = gk20a_falcon_set_irq,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
.dump_falcon_stats = gk20a_falcon_dump_stats,
.dump_falcon_info = gk20a_falcon_dump_info,
#endif
.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
#ifdef CONFIG_NVGPU_FALCON_NON_FUSA

1
drivers/gpu/nvgpu/hal/init/hal_ga10b.c
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@@ -1656,6 +1656,7 @@ static const struct gops_falcon ga10b_ops_falcon = {
.set_irq = gk20a_falcon_set_irq,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
.dump_falcon_stats = ga10b_falcon_dump_stats,
.dump_falcon_info = gk20a_falcon_dump_info,
#endif
#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
.copy_from_dmem = gk20a_falcon_copy_from_dmem,

3
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
View File

@@ -1,7 +1,7 @@
/*
* GM20B Graphics
*
* Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -1023,6 +1023,7 @@ static const struct gops_falcon gm20b_ops_falcon = {
.mailbox_write = gk20a_falcon_mailbox_write,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
.dump_falcon_stats = gk20a_falcon_dump_stats,
.dump_falcon_info = gk20a_falcon_dump_info,
#endif
#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,

1
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -1422,6 +1422,7 @@ static const struct gops_falcon gv11b_ops_falcon = {
.set_irq = gk20a_falcon_set_irq,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
.dump_falcon_stats = gk20a_falcon_dump_stats,
.dump_falcon_info = gk20a_falcon_dump_info,
#endif
#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,

1
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -1513,6 +1513,7 @@ static const struct gops_falcon tu104_ops_falcon = {
.set_irq = gk20a_falcon_set_irq,
#ifdef CONFIG_NVGPU_FALCON_DEBUG
.dump_falcon_stats = gk20a_falcon_dump_stats,
.dump_falcon_info = gk20a_falcon_dump_info,
#endif
.clear_halt_interrupt_status = gk20a_falcon_clear_halt_interrupt_status,
#ifdef CONFIG_NVGPU_FALCON_NON_FUSA

3
drivers/gpu/nvgpu/include/nvgpu/gops/falcon.h
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -70,6 +70,7 @@ struct gops_falcon {
u32 intr_mask, u32 intr_dest);
#ifdef CONFIG_NVGPU_FALCON_DEBUG
void (*dump_falcon_stats)(struct nvgpu_falcon *flcn);
void (*dump_falcon_info)(struct nvgpu_falcon *flcn);
#endif
#if defined(CONFIG_NVGPU_FALCON_DEBUG) || defined(CONFIG_NVGPU_FALCON_NON_FUSA)
int (*copy_from_dmem)(struct nvgpu_falcon *flcn,