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gpu: nvgpu: update pmu, sec2 sw setup sequence

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pmu.g & sec2.g were set in nvgpu_falcon_sw_init. They are now set
in nvgpu_early_init_pmu_sw & nvgpu_init_sec2_setup_sw. Pass gk20a
& pmu struct to nvgpu_init_pmu_fw_support like sec2.
pmu_fw_support & sec2_setup_sw are separated from respective init
sequence and now are called earlier since we need ->g member earlier
and most of the setup is sw only.
nvgpu_init_pmu_fw_ver_ops is now being exported.

JIRA NVGPU-1594

Change-Id: I6c71c6730ce06dad190159269e2cc60301f0237b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1968241
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2018-12-08 07:01:40 +05:30
committed by mobile promotions
parent 8e8e40e66d
commit b8c8d627af
8 changed files with 52 additions and 39 deletions
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18
drivers/gpu/nvgpu/common/init/nvgpu_init.c
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@@ -1,7 +1,7 @@
/*
* GK20A Graphics
*
* Copyright (c) 2011-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -174,6 +174,22 @@ int gk20a_finalize_poweron(struct gk20a *g)
goto done;
}
if (g->ops.pmu.is_pmu_supported(g)) {
err = nvgpu_early_init_pmu_sw(g, &g->pmu);
if (err != 0) {
nvgpu_err(g, "failed to early init pmu sw");
goto done;
}
}
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_RTOS)) {
err = nvgpu_init_sec2_setup_sw(g, &g->sec2);
if (err != 0) {
nvgpu_err(g, "failed to init sec2 sw setup");
goto done;
}
}
if (g->ops.acr.acr_sw_init != NULL &&
nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) {
g->ops.acr.acr_sw_init(g, &g->acr);