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b8c8d627af
pmu.g & sec2.g were set in nvgpu_falcon_sw_init. They are now set in nvgpu_early_init_pmu_sw & nvgpu_init_sec2_setup_sw. Pass gk20a & pmu struct to nvgpu_init_pmu_fw_support like sec2. pmu_fw_support & sec2_setup_sw are separated from respective init sequence and now are called earlier since we need ->g member earlier and most of the setup is sw only. nvgpu_init_pmu_fw_ver_ops is now being exported. JIRA NVGPU-1594 Change-Id: I6c71c6730ce06dad190159269e2cc60301f0237b Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1968241 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>