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gpu: nvgpu: ACR unit doxygen documentation
Add doxygen documentation for nvgpu.common.acr JIRA NVGPU-2516 Change-Id: Idb68115d572775821ea30a71bac8e26ace934e65 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2174267 GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Mahantesh Kumbar
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Alex Waterman
Alex Waterman
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@@ -23,20 +23,201 @@
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#ifndef NVGPU_ACR_H
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#define NVGPU_ACR_H
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/**
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* @file
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* @page unit-acr Unit ACR(Access Controlled Regions)
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*
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* Acronyms
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* ========
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* ACR - Access Controlled Regions
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* ACR HS - Access Controlled Regions Heavy-Secure ucode
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* FB - Frame Buffer
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* non-WPR - non-Write Protected Region
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* WPR - Write Protected Region
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* LS - Light-Secure
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* HS - Heavy-Secure
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* Falcon - Fast Logic CONtroller
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* BLOB - Binary Large OBject
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*
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* Overview
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* ========
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* The ACR unit is responsible for GPU secure boot. ACR unit divides its task
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* into two stages as below,
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*
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* + Blob construct:
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* ACR unit creates LS ucode blob in system/FB's non-WPR memory. LS ucodes
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* will be read from filesystem and added to blob as per ACR unit static
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* config data. ACR unit static config data is set based on current chip.
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* LS ucodes blob is required by the ACR HS ucode to authenticate & load LS
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* ucode on to respective engine's LS Falcon.
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*
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* + ACR HS ucode load & bootstrap:
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* ACR HS ucode is responsible for authenticating self(HS) & LS ucode.
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*
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* ACR HS ucode is read from the filesystem based on the chip-id by the ACR
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* unit. Read ACR HS ucode is loaded onto PMU/SEC2/GSP engines Falcon to
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* bootstrap ACR HS ucode. ACR HS ucode does self-authentication using H/W
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* based HS authentication methodology. Once authenticated the ACR HS ucode
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* starts executing on the falcon.
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*
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* Upon successful ACR HS ucode boot, ACR HS ucode performs a sanity check on
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* WPR memory. If the WPR sanity check passes, then ACR HS ucode copies LS
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* ucodes from system/FB's non-WPR memory to system/FB's WPR memory. The
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* purpose of copying LS ucode to WPR memory is to protect ucodes from
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* modification or tampering. The next step is to authenticate LS ucodes
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* present in WPR memory using S/W based authentication methodology. If the
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* LS ucode authentication passed, then ACR HS ucode loads LS ucode on to
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* respective LS Falcons. If any of the LS ucode authentications fail, then
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* ACR HS ucode updates error details in Falcon mailbox-0/1 & halts its
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* execution. In the passing case, ACR HS ucode halts & updates mailbox-0 with
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* ACR_OK(0x0) status.
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*
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* ACR unit waits for ACR HS ucode to halt & checks for mailbox-0/1 to
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* determine the status of ACR HS ucode. If there was an error then ACR unit
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* returns an error else success.
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*
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* The ACR unit is a s/w unit which doesn't access any h/w registers by itself.
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* It depends on below units to access H/W resource to complete its task.
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*
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* + PMU, SEC2 & GSP unit to access & load ucode on Engines Falcon.
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* + Falcon unit to control/access Engines(PMU, SEC2 & GSP) Falcon to load &
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* execute HS ucode
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* + MM unit to fetch non-WPR/WPR info, allocate & read/write data in
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* non-WPR memory.
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*
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* Data Structures
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* ===============
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*
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* There are no data structures exposed outside of ACR unit in nvgpu.
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*
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* Static Design
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* =============
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*
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* ACR Initialization
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* ------------------
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* ACR initialization happens as part of early NVGPU poweron sequence by calling
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* nvgpu_acr_init(). At ACR init stage memory gets allocated for ACR unit's
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* private data struct. The data struct holds static properties and ops of the
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* ACR unit and is populated based on the detected chip. These static properties
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* and ops will be used by blob-construct and load/bootstrap stage of ACR unit.
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*
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* ACR Teardown
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* ------------
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* The function nvgpu_acr_free() is called from nvgpu_remove() as part of
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* poweroff sequence to clear and free the memory space allocated for ACR unit.
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*
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* External APIs
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* -------------
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* + nvgpu_acr_init()
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* + nvgpu_acr_free()
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*
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* Dynamic Design
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* ==============
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*
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* After ACR unit init completion, the properties and ops of the ACR unit are
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* set to perform blob construction in non-wpr memory & load/bootstrap of HS ACR
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* ucode on specific engine's Falcon.
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*
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* Blob construct
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* --------------
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* The ACR unit creates blob for LS ucodes in nop-WPR memory & update
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* WPR/LS-ucode details in interface which is part of non-wpr region. Interface
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* will be accessed by ACR HS ucode to know in detail about WPR & LS ucodes.
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*
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* Load/Bootstrap ACR HS ucode
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* ---------------------------
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* The ACR unit loads ACR HS ucode onto PMU/SEC2/GSP engines Falcon as per
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* static config data & performs a bootstrap.
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*
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* ACR HS ucode does self-authentication using H/W based HS authentication
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* methodology. Once authenticated the ACR HS ucode starts executing on the
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* falcon. Upon successful ACR HS ucode boot, ACR HS ucode copies LS ucodes
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* from non-WPR memory to WPR memory. The next step is to authenticate LS ucodes
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* present in WPR memory and loads LS ucode on to respective LS Falcons.
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*
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* The ACR unit waits for ACR HS to halt within predefined timeout. Upon ACR HS
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* ucode halt, the ACR unit checks mailbox-0/1 to determine the status of ACR
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* HS ucode. If there is an error then ACR unit returns error else success.
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*
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* External APIs
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* -------------
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* + nvgpu_acr_construct_execute()
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* + nvgpu_acr_is_lsf_lazy_bootstrap()
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* + nvgpu_acr_bootstrap_hs_acr()
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*
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*/
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struct gk20a;
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struct nvgpu_falcon;
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struct nvgpu_firmware;
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struct nvgpu_acr;
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/**
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* @brief ACR initialization to allocate memory for ACR unit & set static
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* properties and ops for LS ucode blob construction as well as for
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* ACR HS ucode bootstrap.
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*
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* @param g [in] The GPU driver struct.
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* @param acr [in] The ACR private data struct.
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*
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* Initializes ACR unit private data struct in the GPU driver based on current
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* chip. Allocate memory for #nvgpu_acr data struct & sets the static properties
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* and ops for LS ucode blob construction as well as for ACR HS ucode bootstrap.
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*
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* @return 0 in case of success, < 0 in case of failure.
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*/
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int nvgpu_acr_init(struct gk20a *g, struct nvgpu_acr **acr);
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#ifdef CONFIG_NVGPU_DGPU
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int nvgpu_acr_alloc_blob_prerequisite(struct gk20a *g, struct nvgpu_acr *acr,
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size_t size);
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int nvgpu_acr_self_hs_load_bootstrap(struct gk20a *g, struct nvgpu_falcon *flcn,
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struct nvgpu_firmware *hs_fw, u32 timeout);
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#endif
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/**
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* @brief Construct blob of LS ucode's in non-wpr memory. Load and bootstrap HS
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* ACR ucode on specified engine Falcon
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*
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* @param g [in] The GPU driver struct.
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* @param acr [in] The ACR private data struct
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*
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* Construct blob of LS ucode in non-wpr memory. Allocation happens in non-WPR
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* system/FB memory based on type of GPU iGPU/dGPU currently in execution. Next,
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* ACR unit loads & bootstrap ACR HS ucode on specified engine Falcon.
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*
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* @return 0 in case of success, < 0 in case of failure.
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*/
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int nvgpu_acr_construct_execute(struct gk20a *g, struct nvgpu_acr *acr);
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/**
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* @brief Read, Load and Bootstrap HS ACR ucode on Engine's Falcon.
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*
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* @param g [in] The GPU driver struct.
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* @param acr [in] The ACR private data struct
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*
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* Load HS ucode on specified engine Falcon as per static config data & does
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* bootstrap to self-HS-authenticate(H/W based) followed by ACR HS execution.
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* ACR unit waits for ACR HS ucode to halt & check mailbox-0/1 to know the
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* status of ACR HS ucode, if there is an error then ACR unit returns an error
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* else success.
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*
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* @return 0 in case of success, < 0 in case of failure.
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*/
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int nvgpu_acr_bootstrap_hs_acr(struct gk20a *g, struct nvgpu_acr *acr);
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/**
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* @brief Chek if ls-Falcon lazy-bootstrap status to load & bootstrap from
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* LS-RTOS or not
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*
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* @param g [in] The GPU driver struct.
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* @param acr [in] The ACR private data struct
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*
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* Chek if ls-Falcon lazy-bootstrap status to load & bootstrap from
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* LS-RTOS or not.
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*
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* @return True in case of success, False in case of failure.
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*/
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bool nvgpu_acr_is_lsf_lazy_bootstrap(struct gk20a *g, struct nvgpu_acr *acr,
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u32 falcon_id);
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@@ -41,6 +41,7 @@
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* - @ref unit-init
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* - @ref unit-falcon
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* - @ref unit-os_utils
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* - @ref unit-acr
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* - Etc, etc.
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*
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* NVGPU Software Unit Design Documentation
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