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gpu: nvgpu: Make priv_cmd_buf honor num_in_flight jobs
If num_in_flight jobs is set use that to determine the proper size of the priv_cmd_buf. If num_in_flight is not set then use the original logic: the priv_cmd_buf is sized based on a worst case assumption for the GPFIFO. Also clean up MISRA issues. Bug 2327792 Change-Id: Ie192caeb6cc48fdcac57e5cbb71c534aeaf46011 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1831095 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -53,7 +53,6 @@
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static void free_channel(struct fifo_gk20a *f, struct channel_gk20a *c);
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static void gk20a_channel_dump_ref_actions(struct channel_gk20a *c);
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static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c);
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static void channel_gk20a_free_priv_cmdbuf(struct channel_gk20a *c);
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static void channel_gk20a_free_prealloc_resources(struct channel_gk20a *c);
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@@ -733,13 +732,20 @@ struct channel_gk20a *gk20a_open_new_channel(struct gk20a *g,
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/* allocate private cmd buffer.
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used for inserting commands before/after user submitted buffers. */
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static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c)
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static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c,
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u32 num_in_flight)
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{
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struct gk20a *g = c->g;
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struct vm_gk20a *ch_vm = c->vm;
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struct priv_cmd_queue *q = &c->priv_cmd_q;
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u32 size;
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int err = 0;
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bool gpfifo_based = false;
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if (num_in_flight == 0U) {
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num_in_flight = c->gpfifo.entry_num;
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gpfifo_based = true;
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}
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/*
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* Compute the amount of priv_cmdbuf space we need. In general the worst
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@@ -758,8 +764,12 @@ static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c)
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*
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* (gpfifo entry number * (2 / 3) * (8 + 10) * 4 bytes.
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*/
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size = roundup_pow_of_two(c->gpfifo.entry_num *
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2 * 18 * sizeof(u32) / 3);
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size = num_in_flight * 18U * (u32)sizeof(u32);
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if (gpfifo_based) {
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size = 2U * size / 3U;
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}
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size = PAGE_ALIGN(roundup_pow_of_two(size));
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err = nvgpu_dma_alloc_map_sys(ch_vm, size, &q->mem);
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if (err != 0) {
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@@ -1233,7 +1243,7 @@ int nvgpu_channel_setup_bind(struct channel_gk20a *c,
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}
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}
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err = channel_gk20a_alloc_priv_cmdbuf(c);
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err = channel_gk20a_alloc_priv_cmdbuf(c, args->num_inflight_jobs);
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if (err != 0) {
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goto clean_up_prealloc;
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}
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