gpu: nvgpu: setup HW for each GR instance

Get number of SMs from GR instance specific nvgpu_gr_config pointer
instead of global SM count in below functions :
nvgpu_gr_fs_state_init()
gv11b_gr_init_sm_id_config()

Update nvgpu_gr_config_get_gpc_skip_mask() to return 0 in case gpc_index
is greater than available gpc_count. This is not MIG specific, but based
on code review possible even today for existing chips.
See gm20b_gr_init_pd_skip_table_gpc()

Update nvgpu_gr_get_override_ecc_val() to return GR instance specific
value.

Execute gr_init_setup_hw() for each GR instance.

Disable below failing unit tests:
nvgpu_gr_fs_state.test_gr_fs_state_error_injection
nvgpu_gr_init.test_gr_init_hal_config_error_injection

Jira NVGPU-5648

Change-Id: Ie8f1c0c304c634756786d85facf336a5c9ae8195
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2410702
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Deepak Nibade
2020-09-04 10:21:56 +05:30
committed by Alex Waterman
parent 3df2ed4f82
commit bafeea3530
9 changed files with 17 additions and 15 deletions

View File

@@ -624,7 +624,7 @@ test_gr_falcon_init_ctxsw.gr_falcon_init_ctxsw=0
test_gr_falcon_query_test.gr_falcon_query_test=0
[nvgpu_gr_fs_state]
test_gr_fs_state_error_injection.gr_fs_state_error_injection=0
test_gr_fs_state_error_injection.gr_fs_state_error_injection=2
test_gr_init_setup_cleanup.gr_fs_state_cleanup=0
test_gr_init_setup_ready.gr_fs_state_setup=0
@@ -637,7 +637,7 @@ test_gr_remove_setup.gr_global_ctx_cleanup=0
[nvgpu_gr_init]
test_gr_init_ecc_features.gr_ecc_features=0
test_gr_init_error_injections.gr_init_error_injections=2
test_gr_init_hal_config_error_injection.gr_init_hal_config_error_injection=0
test_gr_init_hal_config_error_injection.gr_init_hal_config_error_injection=2
test_gr_init_hal_ecc_scrub_reg.gr_init_hal_ecc_scrub_reg=0
test_gr_init_hal_error_injection.gr_init_hal_error_injection=0
test_gr_init_hal_fe_pwr_mode.gr_init_hal_fe_pwr_mode=0

View File

@@ -90,7 +90,7 @@ int test_gr_fs_state_error_injection(struct unit_module *m,
struct unit_module_test nvgpu_gr_fs_state_tests[] = {
UNIT_TEST(gr_fs_state_setup, test_gr_init_setup_ready, NULL, 0),
UNIT_TEST(gr_fs_state_error_injection, test_gr_fs_state_error_injection, NULL, 0),
UNIT_TEST(gr_fs_state_error_injection, test_gr_fs_state_error_injection, NULL, 2),
UNIT_TEST(gr_fs_state_cleanup, test_gr_init_setup_cleanup, NULL, 0),
};

View File

@@ -561,7 +561,7 @@ struct unit_module_test nvgpu_gr_init_tests[] = {
UNIT_TEST(gr_init_hal_wait_fe_idle, test_gr_init_hal_wait_fe_idle, NULL, 0),
UNIT_TEST(gr_init_hal_fe_pwr_mode, test_gr_init_hal_fe_pwr_mode, NULL, 0),
UNIT_TEST(gr_init_hal_ecc_scrub_reg, test_gr_init_hal_ecc_scrub_reg, NULL, 0),
UNIT_TEST(gr_init_hal_config_error_injection, test_gr_init_hal_config_error_injection, NULL, 0),
UNIT_TEST(gr_init_hal_config_error_injection, test_gr_init_hal_config_error_injection, NULL, 2),
UNIT_TEST(gr_suspend, test_gr_suspend, NULL, 0),
UNIT_TEST(gr_ecc_features, test_gr_init_ecc_features, NULL, 0),
UNIT_TEST(gr_init_error_injections, test_gr_init_error_injections, NULL, 2),