gpu: nvgpu: MISRA 4.4 fix to regops

MIRA Advisory Rule 4.4 states that sections of code
should not be commented out.

This change removes the following unused regop type from
our regops support:

  /*#define NVGPU_DBG_REG_OP_TYPE_FB  (0x00000020)*/

Jira NVGPU-3178

Change-Id: I2a65c50aabf6b51072dd6fc1e344d543e3359525
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2245762
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2019-11-22 17:02:03 -08:00
committed by Alex Waterman
parent 3fd253f896
commit bf49a248be

View File

@@ -47,7 +47,6 @@
#define NVGPU_DBG_REG_OP_TYPE_GR_CTX_SM 0x00000004U
#define NVGPU_DBG_REG_OP_TYPE_GR_CTX_CROP 0x00000008U
#define NVGPU_DBG_REG_OP_TYPE_GR_CTX_ZROP 0x00000010U
/*#define NVGPU_DBG_REG_OP_TYPE_FB (0x00000020)*/
#define NVGPU_DBG_REG_OP_TYPE_GR_CTX_QUAD 0x00000040U
/* valid status values */