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gpu: nvgpu: runlist MISRA fixes for Rule 17.7

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Check return code for nvgpu_pmu_lock_release,
g->ops.runlist.reschedule_preempt_next_locked and
g->ops.runlist.wait_pending and throw an
error message in case of failure.

Jira NVGPU-3379

Change-Id: If8a88e54f3dc769c70b772dfc93acfffb4b38d4d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109684
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-05-01 14:42:06 -07:00
committed by mobile promotions
parent 6e83701982
commit bfafc8c4f1
1 changed files with 20 additions and 6 deletions
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26
drivers/gpu/nvgpu/common/fifo/runlist.c
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@@ -466,14 +466,22 @@ int nvgpu_runlist_reschedule(struct channel_gk20a *ch, bool preempt_next,
g, ch->runlist_id, runlist->count, runlist->cur_buffer);
if (preempt_next) {
g->ops.runlist.reschedule_preempt_next_locked(ch, wait_preempt);
if (g->ops.runlist.reschedule_preempt_next_locked(ch,
wait_preempt) != 0) {
nvgpu_err(g, "reschedule preempt next failed");
}
}
g->ops.runlist.wait_pending(g, ch->runlist_id);
if (g->ops.runlist.wait_pending(g, ch->runlist_id) != 0) {
nvgpu_err(g, "wait pending failed for runlist %u",
ch->runlist_id);
}
if (mutex_ret == 0) {
nvgpu_pmu_lock_release(
g, &g->pmu, PMU_MUTEX_ID_FIFO, &token);
if (nvgpu_pmu_lock_release(g, &g->pmu,
PMU_MUTEX_ID_FIFO, &token) != 0) {
nvgpu_err(g, "failed to release PMU lock");
}
}
nvgpu_mutex_release(&runlist->runlist_lock);
@@ -507,7 +515,10 @@ static int nvgpu_runlist_update(struct gk20a *g, u32 runlist_id,
wait_for_finish);
if (mutex_ret == 0) {
nvgpu_pmu_lock_release(g, &g->pmu, PMU_MUTEX_ID_FIFO, &token);
if (nvgpu_pmu_lock_release(g, &g->pmu,
PMU_MUTEX_ID_FIFO, &token) != 0) {
nvgpu_err(g, "failed to release PMU lock");
}
}
nvgpu_mutex_release(&runlist->runlist_lock);
@@ -601,7 +612,10 @@ void nvgpu_fifo_runlist_set_state(struct gk20a *g, u32 runlists_mask,
g->ops.runlist.write_state(g, runlists_mask, runlist_state);
if (mutex_ret == 0) {
nvgpu_pmu_lock_release(g, &g->pmu, PMU_MUTEX_ID_FIFO, &token);
if (nvgpu_pmu_lock_release(g, &g->pmu,
PMU_MUTEX_ID_FIFO, &token) != 0) {
nvgpu_err(g, "failed to release PMU lock");
}
}
}