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gpu: nvgpu: move gk20a_decode_pbdma_chan_eng_ctx_status

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Moved from fifo_gk20a.c to common/fifo/fifo.c
gk20a_decode_pbdma_chan_eng_ctx_status

Renamed
gk20a_decode_pbdma_chan_eng_ctx_status ->
nvgpu_fifo_decode_pbdma_ch_eng_status

JIRA NVGPU-2950

Change-Id: I10ec766a28b1b7dabd334bacfb76a6aa14f49fe6
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2094651
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-04-10 14:39:03 -07:00
committed by mobile promotions
parent 7ac5c9dc0b
commit c0cf011600
7 changed files with 29 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/gpu/nvgpu/common/fifo/fifo.c
View File

@@ -256,3 +256,27 @@ void nvgpu_report_host_error(struct gk20a *g, u32 inst,
inst, err_id, intr_info, ret);
}
}
static const char * const pbdma_ch_eng_status_str[] = {
"invalid",
"valid",
"NA",
"NA",
"NA",
"load",
"save",
"switch",
};
static const char * const not_found_str[] = {
"NOT FOUND"
};
const char *nvgpu_fifo_decode_pbdma_ch_eng_status(u32 index)
{
if (index >= ARRAY_SIZE(pbdma_ch_eng_status_str)) {
return not_found_str[0];
} else {
return pbdma_ch_eng_status_str[index];
}
}

24
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -890,30 +890,6 @@ int gk20a_fifo_suspend(struct gk20a *g)
return 0;
}
static const char * const pbdma_chan_eng_ctx_status_str[] = {
"invalid",
"valid",
"NA",
"NA",
"NA",
"load",
"save",
"switch",
};
static const char * const not_found_str[] = {
"NOT FOUND"
};
const char *gk20a_decode_pbdma_chan_eng_ctx_status(u32 index)
{
if (index >= ARRAY_SIZE(pbdma_chan_eng_ctx_status_str)) {
return not_found_str[0];
} else {
return pbdma_chan_eng_ctx_status_str[index];
}
}
int gk20a_fifo_init_pbdma_map(struct gk20a *g, u32 *pbdma_map, u32 num_pbdma)
{
u32 id;

2
drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
View File

@@ -263,8 +263,6 @@ static inline void gk20a_fifo_profile_snapshot(
}
#endif
const char *gk20a_decode_pbdma_chan_eng_ctx_status(u32 index);
int gk20a_fifo_is_preempt_pending(struct gk20a *g, u32 id,
unsigned int id_type);
int __locked_fifo_preempt(struct gk20a *g, u32 id, bool is_tsg);

2
drivers/gpu/nvgpu/hal/fifo/engine_status_gm20b.c
View File

@@ -193,7 +193,7 @@ void gm20b_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o)
nvgpu_engine_status_is_next_ctx_type_tsg(
&engine_status) ?
"[tsg]" : "[channel]",
gk20a_decode_pbdma_chan_eng_ctx_status(
nvgpu_fifo_decode_pbdma_ch_eng_status(
engine_status.ctxsw_state));
if (engine_status.is_faulted) {

2
drivers/gpu/nvgpu/hal/fifo/engine_status_gv100.c
View File

@@ -66,7 +66,7 @@ void gv100_dump_engine_status(struct gk20a *g, struct gk20a_debug_output *o)
nvgpu_engine_status_is_next_ctx_type_tsg(
&engine_status) ?
"tsg" : "channel",
gk20a_decode_pbdma_chan_eng_ctx_status(
nvgpu_fifo_decode_pbdma_ch_eng_status(
engine_status.ctxsw_state));
if (engine_status.in_reload_status) {

2
drivers/gpu/nvgpu/hal/fifo/pbdma_gm20b.c
View File

@@ -333,7 +333,7 @@ void gm20b_pbdma_dump_status(struct gk20a *g, struct gk20a_debug_output *o)
nvgpu_pbdma_status_is_next_id_type_tsg(
&pbdma_status) ?
"[tsg]" : "[channel]",
gk20a_decode_pbdma_chan_eng_ctx_status(
nvgpu_fifo_decode_pbdma_ch_eng_status(
pbdma_status.pbdma_channel_status));
gk20a_debug_output(o,
" PBDMA_PUT %016llx PBDMA_GET %016llx",

2
drivers/gpu/nvgpu/include/nvgpu/fifo.h
View File

@@ -47,4 +47,6 @@ int nvgpu_fifo_setup_sw_common(struct gk20a *g);
void nvgpu_fifo_cleanup_sw(struct gk20a *g);
void nvgpu_fifo_cleanup_sw_common(struct gk20a *g);
const char *nvgpu_fifo_decode_pbdma_ch_eng_status(u32 index);
#endif /* NVGPU_FIFO_COMMON_H */