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gpu: nvgpu: unit: add test levels

Browse Source 
Add -t/--test-level option for the unit test framework. This
correlates with the test plan levels in GVS. L0 tests are a subset of
the L1 tests. Currently, only test levels 0 and 1 are supported.

The test output has been updated to display skipped tests. Skipped
tests are not included in the test dump.

JIRA NVGPU-2251

Change-Id: Icc2ff19a81529be8526e89f70983e96040390e00
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2085280
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-03-29 11:59:04 -04:00
committed by mobile promotions
parent f7860833f1
commit c0d5a715bd
25 changed files with 293 additions and 218 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
userspace/include/unit/args.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -35,6 +35,7 @@
#define __DEFAULT_ARG_UNIT_LOAD_PATH build/units
#endif
#define DEFAULT_ARG_UNIT_LOAD_PATH stringify(__DEFAULT_ARG_UNIT_LOAD_PATH)
#define TEST_PLAN_MAX 1
struct unit_fw;
@@ -45,6 +46,7 @@ struct unit_fw_args {
int thread_count;
bool nvtest;
bool is_qnx;
unsigned int test_lvl;
const char *binary_name;
const char *unit_name;

12
userspace/include/unit/results.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -48,12 +48,20 @@ struct unit_test_list {
struct unit_test_record *last;
};
enum result_enum {
PASSED,
FAILED,
SKIPPED,
};
struct unit_results {
struct unit_test_list passing;
struct unit_test_list failing;
struct unit_test_list skipped;
int nr_tests;
int nr_passing;
int nr_skipped;
};
#define for_record_in_test_list(__test_list, __test) \
@@ -64,7 +72,7 @@ struct unit_results {
int core_add_test_record(struct unit_fw *fw,
struct unit_module *mod,
struct unit_module_test *test,
bool success);
enum result_enum result);
void core_print_test_status(struct unit_fw *fw);
#endif

11
userspace/include/unit/unit.h
View File

@@ -45,6 +45,11 @@ struct unit_module_test {
*/
module_test_fn fn;
/*
* Minimum test plan level (L0, L1) to execute the test.
*/
unsigned int test_lvl;
/*
* A void pointer to arbitrary arguments. Lets the same unit test
* function perform multiple tests. This gets passed into the
@@ -141,11 +146,12 @@ struct unit_module {
.fw = NULL, \
}
#define UNIT_TEST(__name, __fn, __args) \
#define UNIT_TEST(__name, __fn, __args, __test_lvl) \
{ \
.name = #__name, \
.fn = __fn, \
.args = __args, \
.test_lvl = __test_lvl, \
.jama.requirement = "", \
.jama.unique_id = "", \
.jama.verification_criteria = "", \
@@ -155,11 +161,12 @@ struct unit_module {
* Use this for a unit test that satisfies or contributes to satisfying a
* verification criteria for a given requirement.
*/
#define UNIT_TEST_REQ(__req, __uid, __vc, __name, __fn, __args) \
#define UNIT_TEST_REQ(__req, __uid, __vc, __name, __fn, __args, __test_lvl) \
{ \
.name = #__name, \
.fn = __fn, \
.args = __args, \
.test_lvl = __test_lvl, \
.jama.requirement = __req, \
.jama.unique_id = __uid, \
.jama.verification_criteria = __vc, \

15
userspace/src/args.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -39,11 +39,12 @@ static struct option core_opts[] = {
{ "unit-load-path", 1, NULL, 'L' },
{ "num-threads", 1, NULL, 'j' },
{ "test-level", 1, NULL, 't' },
{ NULL, 0, NULL, 0 }
};
static const char *core_opts_str = "hvqCnQL:j:";
static const char *core_opts_str = "hvqCnQL:j:t:";
void core_print_help(struct unit_fw *fw)
{
@@ -70,6 +71,8 @@ void core_print_help(struct unit_fw *fw)
" Path to where the unit test libraries reside.\n",
" -j, --num-threads <COUNT>\n",
" Number of threads to use while running all tests.\n",
" -t, --test-level <LEVEL>\n",
" Test plan level. 0=L0, 1=L1. default: 1\n",
"\n",
"Note: mandatory arguments to long arguments are mandatory for short\n",
"arguments as well.\n",
@@ -87,6 +90,7 @@ static void set_arg_defaults(struct unit_fw_args *args)
{
args->unit_load_path = DEFAULT_ARG_UNIT_LOAD_PATH;
args->thread_count = 1;
args->test_lvl = TEST_PLAN_MAX;
}
/*
@@ -151,6 +155,13 @@ int core_parse_args(struct unit_fw *fw, int argc, char **argv)
case 'Q':
args->is_qnx = true;
break;
case 't':
args->test_lvl = strtol(optarg, NULL, 10);
if (args->test_lvl > TEST_PLAN_MAX) {
core_err(fw, "Invalid test plan level\n");
return -1;
}
break;
case '?':
args->help = true;
return -1;

14
userspace/src/exec.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -85,6 +85,12 @@ static void *core_exec_module(void *module_param)
int test_status;
thread_local_test = t;
if (t->test_lvl > module->fw->args->test_lvl) {
core_add_test_record(module->fw, module, t, SKIPPED);
core_vbs(module->fw, 1, "Skipping L%d test %s.%s\n",
t->test_lvl, module->name, t->name);
continue;
}
core_msg(module->fw, "Running %s.%s\n", module->name,
t->name);
@@ -92,11 +98,11 @@ static void *core_exec_module(void *module_param)
if (test_status != UNIT_SUCCESS)
core_msg_color(module->fw, C_RED,
" Unit error! Test %s.%s FAILED!\n",
module->name, t->name);
" Unit error! Test %s.%s FAILED!\n",
module->name, t->name);
core_add_test_record(module->fw, module, t,
test_status == UNIT_SUCCESS);
test_status == UNIT_SUCCESS ? PASSED : FAILED);
}
module->fw->nvgpu.nvgpu_posix_cleanup(g);

36
userspace/src/results.c
View File

@@ -76,7 +76,7 @@ static void add_record(struct unit_test_list *list,
int core_add_test_record(struct unit_fw *fw,
struct unit_module *mod,
struct unit_module_test *test,
bool success)
enum result_enum result)
{
struct unit_test_record *tr;
int err = 0;
@@ -98,17 +98,23 @@ int core_add_test_record(struct unit_fw *fw,
tr->mod = mod;
tr->test = test;
tr->status = success;
tr->status = (result == PASSED);
tr->next = NULL;
if (success)
add_record(&fw->results->passing, tr);
else
add_record(&fw->results->failing, tr);
fw->results->nr_tests += 1;
if (success)
switch (result) {
case PASSED:
add_record(&fw->results->passing, tr);
fw->results->nr_passing += 1;
break;
case FAILED:
add_record(&fw->results->failing, tr);
break;
case SKIPPED:
add_record(&fw->results->skipped, tr);
fw->results->nr_skipped += 1;
break;
}
done:
pthread_mutex_unlock(&mutex_results);
@@ -152,6 +158,7 @@ static void dump_test_log(struct unit_fw *fw, struct unit_test_list
void core_print_test_status(struct unit_fw *fw)
{
struct unit_test_list *failing_tests = &fw->results->failing;
struct unit_test_list *skipped_tests = &fw->results->skipped;
struct unit_test_record *rec;
/*
@@ -161,10 +168,21 @@ void core_print_test_status(struct unit_fw *fw)
core_msg(fw, "Test results:\n");
core_msg(fw, "-------------\n");
core_msg(fw, "\n");
core_msg(fw, " Skipped: %d\n", fw->results->nr_skipped);
core_msg(fw, " Passing: %d\n", fw->results->nr_passing);
core_msg(fw, " Failing: %d\n",
fw->results->nr_tests - fw->results->nr_passing);
fw->results->nr_tests - fw->results->nr_passing -
fw->results->nr_skipped);
core_msg(fw, " Total: %d\n", fw->results->nr_tests);
core_msg(fw, "\n");
core_msg(fw, "Skipped tests:\n");
core_msg(fw, "\n");
for_record_in_test_list(skipped_tests, rec) {
core_msg(fw, " %s.%s\n",
rec->mod->name,
rec->test->name);
}
core_msg(fw, "\n");
core_msg(fw, "Failing tests:\n");
core_msg(fw, "\n");

8
userspace/units/enabled/nvgpu-enabled.c
View File

@@ -152,12 +152,12 @@ struct unit_module_test enabled_tests[] = {
/*
* Init test should run first in order to use newly allocated memory.
*/
UNIT_TEST(init, test_nvgpu_init_enabled_flags, NULL),
UNIT_TEST(init, test_nvgpu_init_enabled_flags, NULL, 0),
UNIT_TEST(enabled_flags_false_check, test_nvgpu_enabled_flags_false_check, NULL),
UNIT_TEST(set_enabled, test_nvgpu_set_enabled, NULL),
UNIT_TEST(enabled_flags_false_check, test_nvgpu_enabled_flags_false_check, NULL, 0),
UNIT_TEST(set_enabled, test_nvgpu_set_enabled, NULL, 0),
UNIT_TEST(free, test_nvgpu_free_enabled_flags, NULL),
UNIT_TEST(free, test_nvgpu_free_enabled_flags, NULL, 0),
};
UNIT_MODULE(enabled, enabled_tests, UNIT_PRIO_NVGPU_TEST);

46
userspace/units/fifo/runlist/nvgpu-runlist.c
View File

@@ -495,42 +495,42 @@ static int test_interleaving_l0_l2(struct unit_module *m,
}
struct unit_module_test nvgpu_runlist_tests[] = {
UNIT_TEST(tsg_format_ch1, test_tsg_format_gen, &tsg_fmt_tests[0]),
UNIT_TEST(tsg_format_ch2, test_tsg_format_gen, &tsg_fmt_tests[1]),
UNIT_TEST(tsg_format_ch5, test_tsg_format_gen, &tsg_fmt_tests[2]),
UNIT_TEST(tsg_format_ch1, test_tsg_format_gen, &tsg_fmt_tests[0], 0),
UNIT_TEST(tsg_format_ch2, test_tsg_format_gen, &tsg_fmt_tests[1], 0),
UNIT_TEST(tsg_format_ch5, test_tsg_format_gen, &tsg_fmt_tests[2], 0),
UNIT_TEST(tsg_format_ch1_timeslice, test_tsg_format_gen,
&tsg_fmt_tests[3]),
&tsg_fmt_tests[3], 0),
UNIT_TEST(tsg_format_ch3_inactive2, test_tsg_format_gen,
&tsg_fmt_tests[4]),
&tsg_fmt_tests[4], 0),
UNIT_TEST(flat, test_flat, NULL),
UNIT_TEST(flat, test_flat, NULL, 0),
UNIT_TEST(flat_oversize_tiny, test_flat_oversize_tiny, NULL),
UNIT_TEST(flat_oversize_single, test_flat_oversize_single, NULL),
UNIT_TEST(flat_oversize_onehalf, test_flat_oversize_onehalf, NULL),
UNIT_TEST(flat_oversize_two, test_flat_oversize_two, NULL),
UNIT_TEST(flat_oversize_end, test_flat_oversize_end, NULL),
UNIT_TEST(flat_oversize_tiny, test_flat_oversize_tiny, NULL, 0),
UNIT_TEST(flat_oversize_single, test_flat_oversize_single, NULL, 0),
UNIT_TEST(flat_oversize_onehalf, test_flat_oversize_onehalf, NULL, 0),
UNIT_TEST(flat_oversize_two, test_flat_oversize_two, NULL, 0),
UNIT_TEST(flat_oversize_end, test_flat_oversize_end, NULL, 0),
UNIT_TEST(interleaving,
test_interleaving_gen_all_run, &interleave_tests[0]),
test_interleaving_gen_all_run, &interleave_tests[0], 0),
UNIT_TEST(interleaving_oversize_tiny,
test_interleaving_gen_all_run, &interleave_tests[1]),
test_interleaving_gen_all_run, &interleave_tests[1], 0),
UNIT_TEST(interleaving_oversize_l2,
test_interleaving_gen_all_run, &interleave_tests[2]),
test_interleaving_gen_all_run, &interleave_tests[2], 0),
UNIT_TEST(interleaving_oversize_l2_l1_l2,
test_interleaving_gen_all_run, &interleave_tests[3]),
test_interleaving_gen_all_run, &interleave_tests[3], 0),
UNIT_TEST(interleaving_oversize_l2_l1_l2_l1,
test_interleaving_gen_all_run, &interleave_tests[4]),
test_interleaving_gen_all_run, &interleave_tests[4], 0),
UNIT_TEST(interleaving_oversize_l2_l1_l2_l1_l2,
test_interleaving_gen_all_run, &interleave_tests[5]),
test_interleaving_gen_all_run, &interleave_tests[5], 0),
UNIT_TEST(interleaving_l0, test_interleaving_l0, NULL),
UNIT_TEST(interleaving_l1, test_interleaving_l1, NULL),
UNIT_TEST(interleaving_l2, test_interleaving_l2, NULL),
UNIT_TEST(interleaving_l0_l1, test_interleaving_l0_l1, NULL),
UNIT_TEST(interleaving_l1_l2, test_interleaving_l1_l2, NULL),
UNIT_TEST(interleaving_l0_l2, test_interleaving_l0_l2, NULL),
UNIT_TEST(interleaving_l0, test_interleaving_l0, NULL, 0),
UNIT_TEST(interleaving_l1, test_interleaving_l1, NULL, 0),
UNIT_TEST(interleaving_l2, test_interleaving_l2, NULL, 0),
UNIT_TEST(interleaving_l0_l1, test_interleaving_l0_l1, NULL, 0),
UNIT_TEST(interleaving_l1_l2, test_interleaving_l1_l2, NULL, 0),
UNIT_TEST(interleaving_l0_l2, test_interleaving_l0_l2, NULL, 0),
};
UNIT_MODULE(nvgpu_runlist, nvgpu_runlist_tests, UNIT_PRIO_NVGPU_TEST);

51
userspace/units/fuse/nvgpu-fuse.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -139,49 +139,56 @@ static int test_fuse_device_common_cleanup(struct unit_module *m,
struct unit_module_test fuse_tests[] = {
UNIT_TEST(fuse_gp10b_init, test_fuse_device_common_init,
&gp10b_init_args),
UNIT_TEST(fuse_gp10b_check_sec, test_fuse_gp10b_check_sec, NULL),
&gp10b_init_args, 0),
UNIT_TEST(fuse_gp10b_check_sec, test_fuse_gp10b_check_sec, NULL, 0),
UNIT_TEST(fuse_gp10b_check_gcplex_fail,
test_fuse_gp10b_check_gcplex_fail,
NULL),
NULL,
0),
UNIT_TEST(fuse_gp10b_check_sec_invalid_gcplex,
test_fuse_gp10b_check_sec_invalid_gcplex,
NULL),
NULL,
0),
UNIT_TEST(fuse_gp10b_check_non_sec,
test_fuse_gp10b_check_non_sec,
NULL),
UNIT_TEST(fuse_gp10b_ecc, test_fuse_gp10b_ecc, NULL),
NULL,
0),
UNIT_TEST(fuse_gp10b_ecc, test_fuse_gp10b_ecc, NULL, 0),
UNIT_TEST(fuse_gp10b_feature_override_disable,
test_fuse_gp10b_feature_override_disable, NULL),
UNIT_TEST(fuse_gp10b_check_fmodel, test_fuse_gp10b_check_fmodel, NULL),
test_fuse_gp10b_feature_override_disable, NULL, 0),
UNIT_TEST(fuse_gp10b_check_fmodel, test_fuse_gp10b_check_fmodel, NULL, 0),
UNIT_TEST(fuse_gp10b_cleanup, test_fuse_device_common_cleanup,
&gp10b_init_args),
&gp10b_init_args, 0),
UNIT_TEST(fuse_gm20b_init, test_fuse_device_common_init,
&gm20b_init_args),
UNIT_TEST(fuse_gm20b_check_sec, test_fuse_gm20b_check_sec, NULL),
&gm20b_init_args, 0),
UNIT_TEST(fuse_gm20b_check_sec, test_fuse_gm20b_check_sec, NULL, 0),
UNIT_TEST(fuse_gm20b_check_sec_invalid_gcplex,
test_fuse_gm20b_check_sec_invalid_gcplex,
NULL),
NULL,
0),
UNIT_TEST(fuse_gm20b_check_gcplex_fail,
test_fuse_gm20b_check_gcplex_fail,
NULL),
NULL,
0),
UNIT_TEST(fuse_gm20b_check_non_sec,
test_fuse_gm20b_check_non_sec,
NULL),
UNIT_TEST(fuse_gm20b_basic_fuses, test_fuse_gm20b_basic_fuses, NULL),
UNIT_TEST(fuse_gm20b_check_fmodel, test_fuse_gm20b_check_fmodel, NULL),
NULL,
0),
UNIT_TEST(fuse_gm20b_basic_fuses, test_fuse_gm20b_basic_fuses, NULL, 0),
UNIT_TEST(fuse_gm20b_check_fmodel, test_fuse_gm20b_check_fmodel, NULL, 0),
UNIT_TEST(fuse_gm20b_cleanup, test_fuse_device_common_cleanup,
&gm20b_init_args),
&gm20b_init_args, 0),
UNIT_TEST(fuse_gv100_init, test_fuse_device_common_init,
&gv100_init_args),
UNIT_TEST(fuse_gv100_vin_cal_rev, test_fuse_gv100_vin_cal_rev, NULL),
&gv100_init_args, 0),
UNIT_TEST(fuse_gv100_vin_cal_rev, test_fuse_gv100_vin_cal_rev, NULL, 0),
UNIT_TEST(fuse_gv100_vin_cal_slope_intercept,
test_fuse_gv100_vin_cal_slope_intercept,
NULL),
NULL,
0),
UNIT_TEST(fuse_gv100_cleanup, test_fuse_device_common_cleanup,
&gv100_init_args),
&gv100_init_args, 0),
};
UNIT_MODULE(fuse, fuse_tests, UNIT_PRIO_NVGPU_TEST);

2
userspace/units/interface/bsearch/bsearch.c
View File

@@ -79,7 +79,7 @@ static int test_bsearch(struct unit_module *m, struct gk20a *g,
}
struct unit_module_test interface_bsearch_tests[] = {
UNIT_TEST(test_bsearch, test_bsearch, NULL),
UNIT_TEST(test_bsearch, test_bsearch, NULL, 0),
};
UNIT_MODULE(interface_bsearch, interface_bsearch_tests, UNIT_PRIO_NVGPU_TEST);

10
userspace/units/interface/lock/lock.c
View File

@@ -271,14 +271,14 @@ cleanup:
}
struct unit_module_test interface_lock_tests[] = {
UNIT_TEST(mutex_init, test_mutex_init, NULL),
UNIT_TEST(mutex_init, test_mutex_init, NULL, 0),
UNIT_TEST(mutex_acquire_release, test_lock_acquire_release,
(u64 *) 0),
(u64 *) 0, 0),
UNIT_TEST(spinlock_acquire_release, test_lock_acquire_release,
(u64 *) 1),
(u64 *) 1, 0),
UNIT_TEST(raw_spinlock_acquire_release, test_lock_acquire_release,
(u64 *) 2),
UNIT_TEST(mutex_tryacquire, test_mutex_tryacquire, NULL),
(u64 *) 2, 0),
UNIT_TEST(mutex_tryacquire, test_mutex_tryacquire, NULL, 0),
};
UNIT_MODULE(interface_lock, interface_lock_tests, UNIT_PRIO_NVGPU_TEST);

10
userspace/units/list/list.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -250,10 +250,10 @@ static int test_list_replace(struct unit_module *m, struct gk20a *g,
}
struct unit_module_test list_tests[] = {
UNIT_TEST(list_all_head, test_list_add, (void *) false),
UNIT_TEST(list_all_tail, test_list_add, (void *) true),
UNIT_TEST(list_move, test_list_move, NULL),
UNIT_TEST(list_replace, test_list_replace, NULL),
UNIT_TEST(list_all_head, test_list_add, (void *) false, 0),
UNIT_TEST(list_all_tail, test_list_add, (void *) true, 0),
UNIT_TEST(list_move, test_list_move, NULL, 0),
UNIT_TEST(list_replace, test_list_replace, NULL, 0),
};
UNIT_MODULE(list, list_tests, UNIT_PRIO_NVGPU_TEST);

8
userspace/units/mm/allocators/nvgpu_allocator/nvgpu_allocator.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -323,9 +323,9 @@ static int test_nvgpu_alloc_destroy(struct unit_module *m,
}
struct unit_module_test nvgpu_allocator_tests[] = {
UNIT_TEST(common_init, test_nvgpu_alloc_common_init, NULL),
UNIT_TEST(alloc_destroy, test_nvgpu_alloc_destroy, NULL),
UNIT_TEST(alloc_ops, test_nvgpu_alloc_ops_present, NULL),
UNIT_TEST(common_init, test_nvgpu_alloc_common_init, NULL, 0),
UNIT_TEST(alloc_destroy, test_nvgpu_alloc_destroy, NULL, 0),
UNIT_TEST(alloc_ops, test_nvgpu_alloc_ops_present, NULL, 0),
};
UNIT_MODULE(nvgpu_allocator, nvgpu_allocator_tests, UNIT_PRIO_NVGPU_TEST);

70
userspace/units/mm/gmmu/page_table/page_table.c
View File

@@ -1160,85 +1160,101 @@ static int test_nvgpu_page_table_c2_full(struct unit_module *m,
struct unit_module_test nvgpu_gmmu_tests[] = {
UNIT_TEST(gmmu_init, test_nvgpu_gmmu_init, (void *) 1),
UNIT_TEST(gmmu_init, test_nvgpu_gmmu_init, (void *) 1, 0),
/*
* These 2 tests must run first in the order below to avoid caching
* issues */
UNIT_TEST(map_fail_pd_allocate,
test_nvgpu_gmmu_map_unmap_map_fail,
(void *) SPECIAL_MAP_FAIL_PD_ALLOCATE),
(void *) SPECIAL_MAP_FAIL_PD_ALLOCATE,
0),
UNIT_TEST(map_fail_pd_allocate_child,
test_nvgpu_gmmu_map_unmap_map_fail,
(void *) SPECIAL_MAP_FAIL_PD_ALLOCATE_CHILD),
(void *) SPECIAL_MAP_FAIL_PD_ALLOCATE_CHILD,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem, test_nvgpu_gmmu_map_unmap,
(void *) &test_iommu_sysmem),
(void *) &test_iommu_sysmem, 0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_ro, test_nvgpu_gmmu_map_unmap,
(void *) &test_iommu_sysmem_ro),
(void *) &test_iommu_sysmem_ro, 0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_ro_f, test_nvgpu_gmmu_map_unmap,
(void *) &test_iommu_sysmem_ro_fixed),
(void *) &test_iommu_sysmem_ro_fixed, 0),
UNIT_TEST(gmmu_map_unmap_no_iommu_sysmem, test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_sysmem),
(void *) &test_no_iommu_sysmem, 0),
UNIT_TEST(gmmu_map_unmap_vidmem, test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_vidmem),
(void *) &test_no_iommu_vidmem, 0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_coh, test_nvgpu_gmmu_map_unmap,
(void *) &test_iommu_sysmem_coh),
(void *) &test_iommu_sysmem_coh, 0),
UNIT_TEST(gmmu_set_pte, test_nvgpu_gmmu_set_pte,
(void *) &test_iommu_sysmem),
(void *) &test_iommu_sysmem, 0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_kernel_pages,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_adv),
(void *) &test_iommu_sysmem_adv,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_big_pages,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_adv_big),
(void *) &test_iommu_sysmem_adv_big,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_big_pages_offset,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_adv_big_offset),
(void *) &test_iommu_sysmem_adv_big_offset,
0),
UNIT_TEST(gmmu_map_unmap_no_iommu_sysmem_adv_big_pages_offset_large,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_no_iommu_sysmem_adv_big_offset_large),
(void *) &test_no_iommu_sysmem_adv_big_offset_large,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_small_pages_sparse,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_adv_small_sparse),
(void *) &test_iommu_sysmem_adv_small_sparse,
0),
UNIT_TEST(gmmu_map_unmap_no_iommu_sysmem_noncacheable,
test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_sysmem_noncacheable),
(void *) &test_no_iommu_sysmem_noncacheable,
0),
UNIT_TEST(gmmu_map_unmap_sgt_iommu_sysmem,
test_nvgpu_gmmu_map_unmap,
(void *) &test_sgt_iommu_sysmem),
(void *) &test_sgt_iommu_sysmem,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_ctag,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_adv_ctag),
(void *) &test_iommu_sysmem_adv_ctag,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_big_pages_batched,
test_nvgpu_gmmu_map_unmap_batched,
(void *) &test_iommu_sysmem_adv_big),
(void *) &test_iommu_sysmem_adv_big,
0),
UNIT_TEST(gmmu_map_unmap_unmapped, test_nvgpu_gmmu_map_unmap,
(void *) &test_no_iommu_unmapped),
(void *) &test_no_iommu_unmapped,
0),
UNIT_TEST(gmmu_map_unmap_iommu_sysmem_adv_sgl_skip,
test_nvgpu_gmmu_map_unmap_adv,
(void *) &test_iommu_sysmem_sgl_skip),
(void *) &test_iommu_sysmem_sgl_skip,
0),
UNIT_TEST(map_fail_fi_null_sgt,
test_nvgpu_gmmu_map_unmap_map_fail,
(void *) SPECIAL_MAP_FAIL_FI_NULL_SGT),
(void *) SPECIAL_MAP_FAIL_FI_NULL_SGT,
0),
UNIT_TEST(map_fail_fi_vm_alloc,
test_nvgpu_gmmu_map_unmap_map_fail,
(void *) SPECIAL_MAP_FAIL_VM_ALLOC),
(void *) SPECIAL_MAP_FAIL_VM_ALLOC,
0),
UNIT_TEST(init_page_table_fail,
test_nvgpu_gmmu_init_page_table_fail,
NULL),
NULL,
0),
/*
* Requirement verification tests.
*/
UNIT_TEST_REQ("NVGPU-RQCD-45.C1", PAGE_TABLE_REQ1_UID, "V4",
req_multiple_alignments, test_nvgpu_page_table_c1_full,
NULL),
NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-45.C2", PAGE_TABLE_REQ1_UID, "V4",
req_fixed_address, test_nvgpu_page_table_c2_full,
NULL),
NULL, 0),
UNIT_TEST(gmmu_clean, test_nvgpu_gmmu_clean, NULL),
UNIT_TEST(gmmu_clean, test_nvgpu_gmmu_clean, NULL, 0),
};
UNIT_MODULE(page_table, nvgpu_gmmu_tests, UNIT_PRIO_NVGPU_TEST);

64
userspace/units/mm/gmmu/pd_cache/pd_cache.c
View File

@@ -1037,63 +1037,63 @@ static int test_pd_cache_env_init(struct unit_module *m,
}
struct unit_module_test pd_cache_tests[] = {
UNIT_TEST(env_init, test_pd_cache_env_init, NULL),
UNIT_TEST(init, test_pd_cache_init, NULL),
UNIT_TEST(fini, test_pd_cache_fini, NULL),
UNIT_TEST(env_init, test_pd_cache_env_init, NULL, 0),
UNIT_TEST(init, test_pd_cache_init, NULL, 0),
UNIT_TEST(fini, test_pd_cache_fini, NULL, 0),
/*
* Requirement verification tests.
*/
UNIT_TEST_REQ("NVGPU-RQCD-68.C1,2", PD_CACHE_REQ1_UID, "V4",
valid_alloc, test_pd_cache_valid_alloc, NULL),
valid_alloc, test_pd_cache_valid_alloc, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-68.C3", PD_CACHE_REQ1_UID, "V4",
pd_packing, test_per_pd_size, do_test_pd_cache_packing_size),
pd_packing, test_per_pd_size, do_test_pd_cache_packing_size, 0),
UNIT_TEST_REQ("NVGPU-RQCD-118.C1", PD_CACHE_REQ2_UID, "V3",
pd_reusability, test_per_pd_size, do_test_pd_reusability),
pd_reusability, test_per_pd_size, do_test_pd_reusability, 0),
UNIT_TEST_REQ("NVGPU-RQCD-122.C1", PD_CACHE_REQ3_UID, "V3",
write, test_pd_write, NULL),
write, test_pd_write, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-123.C1", PD_CACHE_REQ4_UID, "V2",
gpu_address, test_gpu_address, NULL),
gpu_address, test_gpu_address, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-126.C1,2", PD_CACHE_REQ5_UID, "V1",
offset_comp, test_offset_computation, NULL),
offset_comp, test_offset_computation, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-124.C1", PD_CACHE_REQ6_UID, "V3",
init_deinit, test_init_deinit, NULL),
init_deinit, test_init_deinit, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-155.C1", PD_CACHE_REQ7_UID, "V2",
multi_init, test_init_deinit, NULL),
multi_init, test_init_deinit, NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-125.C1", PD_CACHE_REQ8_UID, "V2",
deinit, test_init_deinit, NULL),
deinit, test_init_deinit, NULL, 0),
/*
* Direct allocs.
*/
UNIT_TEST(alloc_direct_1xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1xPAGE),
UNIT_TEST(alloc_direct_1024xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE),
UNIT_TEST(alloc_direct_1x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1x16PAGE),
UNIT_TEST(alloc_direct_1024x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1024x16PAGE),
UNIT_TEST(alloc_direct_1024xPAGE_x32x24, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x32x24),
UNIT_TEST(alloc_direct_1024xPAGE_x16x4, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x4),
UNIT_TEST(alloc_direct_1024xPAGE_x16x15, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x15),
UNIT_TEST(alloc_direct_1024xPAGE_x16x1, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x1),
UNIT_TEST(alloc_direct_1xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1xPAGE, 0),
UNIT_TEST(alloc_direct_1024xPAGE, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE, 0),
UNIT_TEST(alloc_direct_1x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1x16PAGE, 0),
UNIT_TEST(alloc_direct_1024x16PAGE, test_pd_cache_alloc_gen, &alloc_direct_1024x16PAGE, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x32x24, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x32x24, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x4, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x4, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x15, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x15, 0),
UNIT_TEST(alloc_direct_1024xPAGE_x16x1, test_pd_cache_alloc_gen, &alloc_direct_1024xPAGE_x16x1, 0),
/*
* Cached allocs.
*/
UNIT_TEST(alloc_1x256B, test_pd_cache_alloc_gen, &alloc_1x256B),
UNIT_TEST(alloc_1x512B, test_pd_cache_alloc_gen, &alloc_1x512B),
UNIT_TEST(alloc_1x1024B, test_pd_cache_alloc_gen, &alloc_1x1024B),
UNIT_TEST(alloc_1x2048B, test_pd_cache_alloc_gen, &alloc_1x2048B),
UNIT_TEST(alloc_1024x256B_x16x15, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x15),
UNIT_TEST(alloc_1024x256B_x16x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x1),
UNIT_TEST(alloc_1024x256B_x32x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x32x1),
UNIT_TEST(alloc_1024x256B_x11x3, test_pd_cache_alloc_gen, &alloc_1024x256B_x11x3),
UNIT_TEST(alloc_1x256B, test_pd_cache_alloc_gen, &alloc_1x256B, 0),
UNIT_TEST(alloc_1x512B, test_pd_cache_alloc_gen, &alloc_1x512B, 0),
UNIT_TEST(alloc_1x1024B, test_pd_cache_alloc_gen, &alloc_1x1024B, 0),
UNIT_TEST(alloc_1x2048B, test_pd_cache_alloc_gen, &alloc_1x2048B, 0),
UNIT_TEST(alloc_1024x256B_x16x15, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x15, 0),
UNIT_TEST(alloc_1024x256B_x16x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x16x1, 0),
UNIT_TEST(alloc_1024x256B_x32x1, test_pd_cache_alloc_gen, &alloc_1024x256B_x32x1, 0),
UNIT_TEST(alloc_1024x256B_x11x3, test_pd_cache_alloc_gen, &alloc_1024x256B_x11x3, 0),
/*
* Error path testing.
*/
UNIT_TEST(free_empty, test_pd_free_empty_pd, NULL),
UNIT_TEST(invalid_pd_alloc, test_pd_alloc_invalid_input, NULL),
UNIT_TEST(alloc_direct_oom, test_pd_alloc_direct_fi, NULL),
UNIT_TEST(alloc_oom, test_pd_alloc_fi, NULL),
UNIT_TEST(free_empty, test_pd_free_empty_pd, NULL, 0),
UNIT_TEST(invalid_pd_alloc, test_pd_alloc_invalid_input, NULL, 0),
UNIT_TEST(alloc_direct_oom, test_pd_alloc_direct_fi, NULL, 0),
UNIT_TEST(alloc_oom, test_pd_alloc_fi, NULL, 0),
};
UNIT_MODULE(pd_cache, pd_cache_tests, UNIT_PRIO_NVGPU_TEST);

16
userspace/units/mm/nvgpu_mem/nvgpu_mem.c
View File

@@ -758,27 +758,27 @@ struct unit_module_test nvgpu_mem_tests[] = {
/*
* Init test should run first in order to use allocated memory.
*/
UNIT_TEST(mem_create_from_phys, test_nvgpu_mem_create_from_phys, NULL),
UNIT_TEST(mem_create_from_phys, test_nvgpu_mem_create_from_phys, NULL, 0),
/*
* Tests for SYSMEM
*/
UNIT_TEST(nvgpu_mem_phys_ops, test_nvgpu_mem_phys_ops, NULL),
UNIT_TEST(nvgpu_memset_sysmem, test_nvgpu_memset_sysmem, NULL),
UNIT_TEST(nvgpu_mem_wr_rd, test_nvgpu_mem_wr_rd, NULL),
UNIT_TEST(mem_iommu_translate, test_nvgpu_mem_iommu_translate, NULL),
UNIT_TEST(nvgpu_mem_phys_ops, test_nvgpu_mem_phys_ops, NULL, 0),
UNIT_TEST(nvgpu_memset_sysmem, test_nvgpu_memset_sysmem, NULL, 0),
UNIT_TEST(nvgpu_mem_wr_rd, test_nvgpu_mem_wr_rd, NULL, 0),
UNIT_TEST(mem_iommu_translate, test_nvgpu_mem_iommu_translate, NULL, 0),
/*
* Tests covering VIDMEM branches
*/
UNIT_TEST(nvgpu_aperture_mask, test_nvgpu_aperture_mask, NULL),
UNIT_TEST(nvgpu_mem_vidmem, test_nvgpu_mem_vidmem, NULL),
UNIT_TEST(nvgpu_aperture_mask, test_nvgpu_aperture_mask, NULL, 0),
UNIT_TEST(nvgpu_mem_vidmem, test_nvgpu_mem_vidmem, NULL, 0),
/*
* Free test should be executed at the end to free allocated memory.
* As nvgpu_mem doesn't not have an explicit free function for sysmem,
* this test doesn't cover any nvgpu_mem code.
*/
UNIT_TEST(test_free_nvgpu_mem, test_free_nvgpu_mem, NULL),
UNIT_TEST(test_free_nvgpu_mem, test_free_nvgpu_mem, NULL, 0),
};
UNIT_MODULE(nvgpu_mem, nvgpu_mem_tests, UNIT_PRIO_NVGPU_TEST);

10
userspace/units/mm/nvgpu_sgt/nvgpu_sgt.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -433,10 +433,10 @@ static int test_nvgpu_sgt_alignment_with_iommu(struct unit_module *m,
}
struct unit_module_test nvgpu_sgt_tests[] = {
UNIT_TEST(sgt_basic_apis, test_nvgpu_sgt_basic_apis, NULL),
UNIT_TEST(sgt_get_next, test_nvgpu_sgt_get_next, NULL),
UNIT_TEST(sgt_alignment_non_iommu, test_nvgpu_sgt_alignment_non_iommu, NULL),
UNIT_TEST(sgt_alignment_with_iommu, test_nvgpu_sgt_alignment_with_iommu, NULL),
UNIT_TEST(sgt_basic_apis, test_nvgpu_sgt_basic_apis, NULL, 0),
UNIT_TEST(sgt_get_next, test_nvgpu_sgt_get_next, NULL, 0),
UNIT_TEST(sgt_alignment_non_iommu, test_nvgpu_sgt_alignment_non_iommu, NULL, 0),
UNIT_TEST(sgt_alignment_with_iommu, test_nvgpu_sgt_alignment_with_iommu, NULL, 0),
};
UNIT_MODULE(nvgpu_sgt, nvgpu_sgt_tests, UNIT_PRIO_NVGPU_TEST);

14
userspace/units/mm/page_table_faults/page_table_faults.c
View File

@@ -351,13 +351,13 @@ static int test_page_faults_clean(struct unit_module *m, struct gk20a *g,
}
struct unit_module_test nvgpu_gmmu_faults_tests[] = {
UNIT_TEST(init, test_page_faults_init, (void *)0),
UNIT_TEST(pending, test_page_faults_pending, NULL),
UNIT_TEST(disable_hw, test_page_faults_disable_hw, NULL),
UNIT_TEST(inst_block_s0, test_page_faults_inst_block, (void *)0),
UNIT_TEST(inst_block_s1, test_page_faults_inst_block, (void *)1),
UNIT_TEST(inst_block_s2, test_page_faults_inst_block, (void *)2),
UNIT_TEST(clean, test_page_faults_clean, NULL),
UNIT_TEST(init, test_page_faults_init, (void *)0, 0),
UNIT_TEST(pending, test_page_faults_pending, NULL, 0),
UNIT_TEST(disable_hw, test_page_faults_disable_hw, NULL, 0),
UNIT_TEST(inst_block_s0, test_page_faults_inst_block, (void *)0, 0),
UNIT_TEST(inst_block_s1, test_page_faults_inst_block, (void *)1, 0),
UNIT_TEST(inst_block_s2, test_page_faults_inst_block, (void *)2, 0),
UNIT_TEST(clean, test_page_faults_clean, NULL, 0),
};
UNIT_MODULE(page_table_faults, nvgpu_gmmu_faults_tests, UNIT_PRIO_NVGPU_TEST);

4
userspace/units/mm/vm/vm.c
View File

@@ -606,13 +606,13 @@ struct unit_module_test vm_tests[] = {
"V5",
map_buf,
test_map_buf,
NULL),
NULL, 0),
UNIT_TEST_REQ("NVGPU-RQCD-45.C2",
VM_REQ1_UID,
"V5",
map_buf_gpu_va,
test_map_buf_gpu_va,
NULL),
NULL, 0),
};
UNIT_MODULE(vm, vm_tests, UNIT_PRIO_NVGPU_TEST);

32
userspace/units/posix/bitops/posix-bitops.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -652,21 +652,21 @@ static int test_bitmap_setclear(struct unit_module *m,
struct unit_module_test posix_bitops_tests[] = {
UNIT_TEST(info, test_bitmap_info, NULL),
UNIT_TEST(ffs, test_ffs, NULL),
UNIT_TEST(fls, test_fls, NULL),
UNIT_TEST(ffz, test_ffz, NULL),
UNIT_TEST(find_first_bit, test_find_first_bit, &first_bit_args),
UNIT_TEST(find_first_zero_bit, test_find_first_bit, &first_zero_args),
UNIT_TEST(find_next_bit, test_find_next_bit, NULL),
UNIT_TEST(find_zero_area, test_find_zero_area, NULL),
UNIT_TEST(single_bitops, test_single_bitops, NULL),
UNIT_TEST(bit_set, test_bit_setclear, &set_args),
UNIT_TEST(bit_clear, test_bit_setclear, &clear_args),
UNIT_TEST(test_and_set_bit, test_test_and_setclear_bit, &set_args),
UNIT_TEST(test_and_clear_bit, test_test_and_setclear_bit, &clear_args),
UNIT_TEST(bitmap_set, test_bitmap_setclear, &set_args),
UNIT_TEST(bitmap_clear, test_bitmap_setclear, &clear_args),
UNIT_TEST(info, test_bitmap_info, NULL, 0),
UNIT_TEST(ffs, test_ffs, NULL, 0),
UNIT_TEST(fls, test_fls, NULL, 0),
UNIT_TEST(ffz, test_ffz, NULL, 0),
UNIT_TEST(find_first_bit, test_find_first_bit, &first_bit_args, 0),
UNIT_TEST(find_first_zero_bit, test_find_first_bit, &first_zero_args, 0),
UNIT_TEST(find_next_bit, test_find_next_bit, NULL, 0),
UNIT_TEST(find_zero_area, test_find_zero_area, NULL, 0),
UNIT_TEST(single_bitops, test_single_bitops, NULL, 0),
UNIT_TEST(bit_set, test_bit_setclear, &set_args, 0),
UNIT_TEST(bit_clear, test_bit_setclear, &clear_args, 0),
UNIT_TEST(test_and_set_bit, test_test_and_setclear_bit, &set_args, 0),
UNIT_TEST(test_and_clear_bit, test_test_and_setclear_bit, &clear_args, 0),
UNIT_TEST(bitmap_set, test_bitmap_setclear, &set_args, 0),
UNIT_TEST(bitmap_clear, test_bitmap_setclear, &clear_args, 0),
};
UNIT_MODULE(posix_bitops, posix_bitops_tests, UNIT_PRIO_POSIX_TEST);

10
userspace/units/posix/env/posix-env.c vendored
View File

@@ -219,11 +219,11 @@ static int sanity_test_type_max(struct unit_module *m,
}
struct unit_module_test posix_env_tests[] = {
UNIT_TEST(sizes, sanity_test_sizes, NULL),
UNIT_TEST(signage, sanity_test_signage, NULL),
UNIT_TEST(endianness, sanity_test_endianness, NULL),
UNIT_TEST(ptr_in_u64, sanity_test_ptr_in_u64, NULL),
UNIT_TEST(type_max, sanity_test_type_max, NULL),
UNIT_TEST(sizes, sanity_test_sizes, NULL, 0),
UNIT_TEST(signage, sanity_test_signage, NULL, 0),
UNIT_TEST(endianness, sanity_test_endianness, NULL, 0),
UNIT_TEST(ptr_in_u64, sanity_test_ptr_in_u64, NULL, 0),
UNIT_TEST(type_max, sanity_test_type_max, NULL, 0),
};
UNIT_MODULE(posix_env, posix_env_tests, UNIT_PRIO_POSIX_TEST);

28
userspace/units/posix/fault-injection/posix-fault-injection.c
View File

@@ -34,30 +34,30 @@ static int test_fault_injection_init(struct unit_module *m,
}
struct unit_module_test fault_injection_tests[] = {
UNIT_TEST(fault_injection_init, test_fault_injection_init, NULL),
UNIT_TEST(fault_injection_init, test_fault_injection_init, NULL, 0),
UNIT_TEST(init, test_kmem_init, NULL),
UNIT_TEST(init, test_kmem_init, NULL, 0),
UNIT_TEST(cache_default, test_kmem_cache_fi_default, NULL),
UNIT_TEST(cache_enabled, test_kmem_cache_fi_enabled, NULL),
UNIT_TEST(cache_default, test_kmem_cache_fi_default, NULL, 0),
UNIT_TEST(cache_enabled, test_kmem_cache_fi_enabled, NULL, 0),
UNIT_TEST(cache_delayed_enable, test_kmem_cache_fi_delayed_enable,
NULL),
NULL, 0),
UNIT_TEST(cache_delayed_disable, test_kmem_cache_fi_delayed_disable,
NULL),
NULL, 0),
UNIT_TEST(kmalloc_default, test_kmem_kmalloc_fi_default, NULL),
UNIT_TEST(kmalloc_enabled, test_kmem_kmalloc_fi_enabled, NULL),
UNIT_TEST(kmalloc_default, test_kmem_kmalloc_fi_default, NULL, 0),
UNIT_TEST(kmalloc_enabled, test_kmem_kmalloc_fi_enabled, NULL, 0),
UNIT_TEST(kmalloc_delayed_enable,
test_kmem_kmalloc_fi_delayed_enable, NULL),
test_kmem_kmalloc_fi_delayed_enable, NULL, 0),
UNIT_TEST(kmalloc_delayed_disable,
test_kmem_kmalloc_fi_delayed_disable, NULL),
test_kmem_kmalloc_fi_delayed_disable, NULL, 0),
UNIT_TEST(dma_alloc_init, test_dma_alloc_init, NULL),
UNIT_TEST(dma_alloc_init, test_dma_alloc_init, NULL, 0),
UNIT_TEST(dma_alloc_default, test_dma_alloc_fi_default, NULL),
UNIT_TEST(dma_alloc_enabled, test_dma_alloc_fi_enabled, NULL),
UNIT_TEST(dma_alloc_default, test_dma_alloc_fi_default, NULL, 0),
UNIT_TEST(dma_alloc_enabled, test_dma_alloc_fi_enabled, NULL, 0),
UNIT_TEST(dma_alloc_delayed_enable, test_dma_alloc_fi_delayed_enable,
NULL),
NULL, 0),
};
UNIT_MODULE(fault_injection, fault_injection_tests, UNIT_PRIO_POSIX_TEST);

20
userspace/units/posix/mockio/posix-mockio.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -326,16 +326,16 @@ static int test_register_space(struct unit_module *m, struct gk20a *g,
struct unit_module_test posix_mockio_tests[] = {
UNIT_TEST(register_io_callbacks, test_register_io_callbacks, NULL),
UNIT_TEST(writel, test_writel, &nvgpu_writel_args),
UNIT_TEST(writel_check, test_writel, &nvgpu_writel_check_args),
UNIT_TEST(bar1_writel, test_writel, &nvgpu_bar1_writel_args),
UNIT_TEST(register_io_callbacks, test_register_io_callbacks, NULL, 0),
UNIT_TEST(writel, test_writel, &nvgpu_writel_args, 0),
UNIT_TEST(writel_check, test_writel, &nvgpu_writel_check_args, 0),
UNIT_TEST(bar1_writel, test_writel, &nvgpu_bar1_writel_args, 0),
UNIT_TEST(usermode_writel, test_writel,
&nvgpu_usermode_writel_args),
UNIT_TEST(readl, test_readl, &nvgpu_readl_args),
UNIT_TEST(__readl, test_readl, &__nvgpu_readl_args),
UNIT_TEST(bar1_readl, test_readl, &nvgpu_bar1_readl_args),
UNIT_TEST(test_register_space, test_register_space, NULL),
&nvgpu_usermode_writel_args, 0),
UNIT_TEST(readl, test_readl, &nvgpu_readl_args, 0),
UNIT_TEST(__readl, test_readl, &__nvgpu_readl_args, 0),
UNIT_TEST(bar1_readl, test_readl, &nvgpu_bar1_readl_args, 0),
UNIT_TEST(test_register_space, test_register_space, NULL, 0),
};
UNIT_MODULE(posix_mockio, posix_mockio_tests, UNIT_PRIO_POSIX_TEST);

10
userspace/units/pramin/nvgpu-pramin.c
View File

@@ -499,11 +499,11 @@ static int test_pramin_nvgpu_dying(struct unit_module *m, struct gk20a *g,
}
struct unit_module_test pramin_tests[] = {
UNIT_TEST(nvgpu_pramin_rd_n_1_sgl, test_pramin_rd_n_single, NULL),
UNIT_TEST(nvgpu_pramin_wr_n_3_sgl, test_pramin_wr_n_multi, NULL),
UNIT_TEST(nvgpu_pramin_memset, test_pramin_memset, NULL),
UNIT_TEST(nvgpu_pramin_dying, test_pramin_nvgpu_dying, NULL),
UNIT_TEST(nvgpu_pramin_free_test_env, free_test_env, NULL),
UNIT_TEST(nvgpu_pramin_rd_n_1_sgl, test_pramin_rd_n_single, NULL, 0),
UNIT_TEST(nvgpu_pramin_wr_n_3_sgl, test_pramin_wr_n_multi, NULL, 0),
UNIT_TEST(nvgpu_pramin_memset, test_pramin_memset, NULL, 0),
UNIT_TEST(nvgpu_pramin_dying, test_pramin_nvgpu_dying, NULL, 0),
UNIT_TEST(nvgpu_pramin_free_test_env, free_test_env, NULL, 0),
};
UNIT_MODULE(pramin, pramin_tests, UNIT_PRIO_NVGPU_TEST);

6
userspace/units/test/test.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -37,8 +37,8 @@ int test_fail(struct unit_module *m, struct gk20a *g, void *args)
}
struct unit_module_test test_tests[] = {
UNIT_TEST(simplest, test_simplest, NULL),
UNIT_TEST(fail, test_fail, NULL),
UNIT_TEST(simplest, test_simplest, NULL, 0),
UNIT_TEST(fail, test_fail, NULL, 0),
};
UNIT_MODULE(test, test_tests, UNIT_PRIO_SELF_TEST);