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gpu: nvgpu: gp10b: Correct steady state CB size

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Program steady state CB size to be the HW default.

Bug 1626065

Change-Id: If0bdc5a649f307b6adab4e914a6201222b8453f8
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/725106
This commit is contained in:
Terje Bergstrom
2015-03-30 11:21:27 -07:00
committed by Deepak Nibade
parent 4de370c12e
commit c258832b99
2 changed files with 9 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/gp10b/gr_gp10b.c
View File

@@ -110,7 +110,7 @@ int gr_gp10b_commit_global_cb_manager(struct gk20a *g,
gr_gk20a_ctx_patch_write(g, ch_ctx,
gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_r() + temp +
proj_ppc_in_gpc_stride_v() * ppc_index,
gr->alpha_cb_default_size * gr->pes_tpc_count[ppc_index][gpc_index],
gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_default_v(),
patch);
attrib_offset_in_chunk += gr->attrib_cb_size *

8
drivers/gpu/nvgpu/gp10b/hw_gr_gp10b.h
View File

@@ -2174,6 +2174,14 @@ static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_r(void)
{
return 0x005030f0;
}
static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_f(u32 v)
{
return (v & 0x3fffff) << 0;
}
static inline u32 gr_gpc0_ppc0_cbm_beta_steady_state_cb_size_v_default_v(void)
{
return 0x00030000;
}
static inline u32 gr_gpccs_falcon_addr_r(void)
{
return 0x0041a0ac;