gpu: nvgpu: doxygen for gr/fs_state.h

Add doxygen documentation for gr/fs_state.h header

Jira NVGPU-3911

Change-Id: I8dd8dd113dcc601f569a300158e83e41214f7c7b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2184655
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/include/nvgpu/gr/fs_state.h

@@ -23,9 +23,33 @@
 #ifndef NVGPU_GR_FS_STATE_H
 #define NVGPU_GR_FS_STATE_H
 
+/**
+ * @file
+ *
+ * common.gr.fs_state unit interface
+ */
 struct gk20a;
 struct nvgpu_gr_config;
 
+/**
+ * @brief Initialize GR engine h/w state post-floorsweeping.
+ *
+ * @param g[in]			Pointer to GPU driver struct.
+ * @param config[in]		Pointer to GR config struct.
+ *
+ * This function initializes GR engine h/w state after considering
+ * floorsweeping.
+ *
+ * It is possible that certain TPC (and hence SMs) in GPC are
+ * floorswept and hence not available for any processing. In this case
+ * common.gr unit is responsible to enumerate only available TPCs
+ * and configure GR engine h/w registers with available GPC/TPC/SM count
+ * and mapping.
+ *
+ * @return 0 in case of success, < 0 in case of failure.
+ * @retval -ENOMEM if memory allocation fails for any internal data
+ *         structure.
+ */
 int nvgpu_gr_fs_state_init(struct gk20a *g, struct nvgpu_gr_config *config);
 
 #endif /* NVGPU_GR_FS_STATE_H */

drivers/gpu/nvgpu/include/nvgpu/gr/gr.h

@@ -74,6 +74,8 @@
  * Static Design
  * =============
  *
+ *   + include/nvgpu/gr/fs_state.h
+ *
  * Resource utilization
  * --------------------
  *