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gpu: nvgpu: fix MISRA 17.7 in common.sec2.allocator

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MISRA Rule 17.7 doesn't allow return value of a function to be ignored.
This patch checks return value of nvgpu_allocator_init function and
returns error to the sec2_process_init_msg() function.

Jira NVGPU-3321

Change-Id: Ie3eb1b5f9312e178f8f3e6de310d768c3ac3e220
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2123221
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2019-05-21 16:45:39 -07:00
committed by mobile promotions
parent 4071b35235
commit c3f7d9a3b0
3 changed files with 13 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/common/sec2/ipc/sec2_msg.c
View File

@@ -158,7 +158,11 @@ static int sec2_process_init_msg(struct nvgpu_sec2 *sec2,
return err;
}
nvgpu_sec2_dmem_allocator_init(g, &sec2->dmem, sec2_init);
err = nvgpu_sec2_dmem_allocator_init(g, &sec2->dmem, sec2_init);
if (err != 0) {
nvgpu_sec2_queues_free(g, sec2->queues);
return err;
}
sec2->sec2_ready = true;

9
drivers/gpu/nvgpu/common/sec2/sec2_allocator.c
View File

@@ -24,10 +24,11 @@
#include <nvgpu/allocator.h>
#include <nvgpu/sec2/msg.h>
void nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
int nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
struct nvgpu_allocator *dmem,
struct sec2_init_msg_sec2_init *sec2_init)
{
int err = 0;
if (!nvgpu_alloc_initialized(dmem)) {
/* Align start and end addresses */
u32 start = ALIGN(sec2_init->nv_managed_area_offset,
@@ -38,10 +39,14 @@ void nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
~(PMU_DMEM_ALLOC_ALIGNMENT - 1U);
u32 size = end - start;
nvgpu_allocator_init(g, dmem, NULL, "sec2_dmem", start,
err = nvgpu_allocator_init(g, dmem, NULL, "sec2_dmem", start,
size, PMU_DMEM_ALLOC_ALIGNMENT, 0ULL, 0ULL,
BITMAP_ALLOCATOR);
if (err != 0) {
nvgpu_err(g, "Couldn't init sec2_dmem allocator\n");
}
}
return err;
}
void nvgpu_sec2_dmem_allocator_destroy(struct nvgpu_allocator *dmem)

2
drivers/gpu/nvgpu/include/nvgpu/sec2/allocator.h
View File

@@ -27,7 +27,7 @@ struct gk20a;
struct nvgpu_allocator;
struct sec2_init_msg_sec2_init;
void nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
int nvgpu_sec2_dmem_allocator_init(struct gk20a *g,
struct nvgpu_allocator *dmem,
struct sec2_init_msg_sec2_init *sec2_init);
void nvgpu_sec2_dmem_allocator_destroy(struct nvgpu_allocator *dmem);