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gpu: nvgpu: add TSG interleave support

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Add support for changing a TSG's runlist interleave
level.

JIRA VFND-1497
Bug 1749744

Change-Id: I3cf3ebc2334f83b1bfb6b3230fae2ca73c75c239
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/1122677
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Aingara Paramakuru
2016-04-08 18:07:08 -04:00
committed by Terje Bergstrom
parent 6b35cb05b7
commit c4e4f2567d
2 changed files with 37 additions and 1 deletions
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34
drivers/gpu/nvgpu/gk20a/tsg_gk20a.c
View File

@@ -325,6 +325,26 @@ static int gk20a_tsg_event_id_ctrl(struct gk20a *g, struct tsg_gk20a *tsg,
return err; return err;
} }
static int gk20a_tsg_set_runlist_interleave(struct tsg_gk20a *tsg, u32 level)
{
struct gk20a *g = tsg->g;
int ret;
switch (level) {
case NVGPU_RUNLIST_INTERLEAVE_LEVEL_LOW:
case NVGPU_RUNLIST_INTERLEAVE_LEVEL_MEDIUM:
case NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH:
ret = g->ops.fifo.set_runlist_interleave(g, tsg->tsgid,
true, 0, level);
break;
default:
ret = -EINVAL;
break;
}
return ret ? ret : g->ops.fifo.update_runlist(g, 0, ~0, true, true);
}
static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg) static void release_used_tsg(struct fifo_gk20a *f, struct tsg_gk20a *tsg)
{ {
mutex_lock(&f->tsg_inuse_mutex); mutex_lock(&f->tsg_inuse_mutex);
@@ -520,6 +540,20 @@ long gk20a_tsg_dev_ioctl(struct file *filp, unsigned int cmd,
break; break;
} }
case NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE:
{
err = gk20a_busy(g->dev);
if (err) {
gk20a_err(dev_from_gk20a(g),
"failed to host gk20a for ioctl cmd: 0x%x", cmd);
return err;
}
err = gk20a_tsg_set_runlist_interleave(tsg,
((struct nvgpu_runlist_interleave_args *)buf)->level);
gk20a_idle(g->dev);
break;
}
default: default:
gk20a_err(dev_from_gk20a(g), gk20a_err(dev_from_gk20a(g),
"unrecognized tsg gpu ioctl cmd: 0x%x", "unrecognized tsg gpu ioctl cmd: 0x%x",

4
include/uapi/linux/nvgpu.h
View File

@@ -465,11 +465,13 @@ struct nvgpu_gpu_get_gpu_time_args {
_IOW(NVGPU_TSG_IOCTL_MAGIC, 6, struct nvgpu_set_priority_args) _IOW(NVGPU_TSG_IOCTL_MAGIC, 6, struct nvgpu_set_priority_args)
#define NVGPU_IOCTL_TSG_EVENT_ID_CTRL \ #define NVGPU_IOCTL_TSG_EVENT_ID_CTRL \
_IOWR(NVGPU_TSG_IOCTL_MAGIC, 7, struct nvgpu_event_id_ctrl_args) _IOWR(NVGPU_TSG_IOCTL_MAGIC, 7, struct nvgpu_event_id_ctrl_args)
#define NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE \
_IOW(NVGPU_TSG_IOCTL_MAGIC, 8, struct nvgpu_runlist_interleave_args)
#define NVGPU_TSG_IOCTL_MAX_ARG_SIZE \ #define NVGPU_TSG_IOCTL_MAX_ARG_SIZE \
sizeof(struct nvgpu_event_id_ctrl_args) sizeof(struct nvgpu_event_id_ctrl_args)
#define NVGPU_TSG_IOCTL_LAST \ #define NVGPU_TSG_IOCTL_LAST \
_IOC_NR(NVGPU_IOCTL_TSG_EVENT_ID_CTRL) _IOC_NR(NVGPU_IOCTL_TSG_SET_RUNLIST_INTERLEAVE)
/* /*