nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: remove access to mc_enable_pb_r()

Browse Source 
We don't need to configure mc_enable_pb_r() register in any of the supported
chips, so remove access to this register

Jira NVGPUT-52

Change-Id: I8a7a524367ce7953f926143242c6d63bc8fd5ed1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1711245
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2018-05-09 06:27:08 -07:00
committed by mobile promotions
parent 4f40637c58
commit c5db005b73
2 changed files with 0 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -796,12 +796,6 @@ int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
g->ops.clock_gating.blcg_fifo_load_gating_prod(g,
g->blcg_enabled);
/* enable pbdma */
mask = 0;
for (i = 0; i < host_num_pbdma; ++i)
mask |= mc_enable_pb_sel_f(mc_enable_pb_0_enabled_v(), i);
gk20a_writel(g, mc_enable_pb_r(), mask);
timeout = gk20a_readl(g, fifo_fb_timeout_r());
timeout = set_field(timeout, fifo_fb_timeout_period_m(),
fifo_fb_timeout_period_max_f());

7
drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
View File

@@ -1171,13 +1171,6 @@ int gv11b_init_fifo_reset_enable_hw(struct gk20a *g)
g->ops.clock_gating.blcg_fifo_load_gating_prod(g,
g->blcg_enabled);
/* enable pbdma */
mask = 0;
for (i = 0; i < host_num_pbdma; ++i)
mask |= mc_enable_pb_sel_f(mc_enable_pb_0_enabled_v(), i);
gk20a_writel(g, mc_enable_pb_r(), mask);
timeout = gk20a_readl(g, fifo_fb_timeout_r());
nvgpu_log_info(g, "fifo_fb_timeout reg val = 0x%08x", timeout);
if (!nvgpu_platform_is_silicon(g)) {