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gpu: nvgpu: Fix comment in priv_cmd_buf allocation

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Update the comment to fix obvious issues and describe the
new allocation logic.

Bug 2327792

Change-Id: Ica0dd4159467e3023cc487a2bf9f525db3ad76e6
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1831096
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Alex Waterman
2018-09-18 12:59:40 -07:00
committed by mobile promotions
parent b9ec592f1d
commit c64f9432b1
1 changed files with 14 additions and 7 deletions
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21
drivers/gpu/nvgpu/common/fifo/channel.c
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@@ -753,16 +753,23 @@ static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c,
* Any sync-pt fences will take less memory so we can ignore them for * Any sync-pt fences will take less memory so we can ignore them for
* now. * now.
* *
* A semaphore ACQ (fence-wait) is 8 dwords: semaphore_a, semaphore_b, * A semaphore ACQ (fence-wait) is 8 words: semaphore_a, semaphore_b,
* semaphore_c, and semaphore_d. A semaphore INCR (fence-get) will be 10 * semaphore_c, and semaphore_d. A semaphore INCR (fence-get) will be 10
* dwords: all the same as an ACQ plus a non-stalling intr which is * words: all the same as an ACQ plus a non-stalling intr which is
* another 2 dwords. * another 2 words.
* *
* Lastly the number of gpfifo entries per channel is fixed so at most * We have two cases to consider: the first is we base the size of the
* we can use 2/3rds of the gpfifo entries (1 pre-fence entry, one * priv_cmd_buf on the gpfifo count. Here we multiply by a factor of
* userspace entry, and one post-fence entry). Thus the computation is: * 2/3rds because only at most 2/3rds of the GPFIFO can be used for
* sync commands:
* *
* (gpfifo entry number * (2 / 3) * (8 + 10) * 4 bytes. * nr_gpfifos * (2 / 3) * (8 + 10) * 4 bytes
*
* If instead num_in_flight is specified then we will use that to size
* the priv_cmd_buf. The worst case is two sync commands (one ACQ and
* one INCR) per submit so we have a priv_cmd_buf size of:
*
* num_in_flight * (8 + 10) * 4 bytes
*/ */
size = num_in_flight * 18U * (u32)sizeof(u32); size = num_in_flight * 18U * (u32)sizeof(u32);
if (gpfifo_based) { if (gpfifo_based) {