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gpu: nvgpu: Fix comment in priv_cmd_buf allocation
Update the comment to fix obvious issues and describe the new allocation logic. Bug 2327792 Change-Id: Ica0dd4159467e3023cc487a2bf9f525db3ad76e6 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1831096 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -753,16 +753,23 @@ static int channel_gk20a_alloc_priv_cmdbuf(struct channel_gk20a *c,
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* Any sync-pt fences will take less memory so we can ignore them for
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* now.
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*
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* A semaphore ACQ (fence-wait) is 8 dwords: semaphore_a, semaphore_b,
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* A semaphore ACQ (fence-wait) is 8 words: semaphore_a, semaphore_b,
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* semaphore_c, and semaphore_d. A semaphore INCR (fence-get) will be 10
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* dwords: all the same as an ACQ plus a non-stalling intr which is
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* another 2 dwords.
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* words: all the same as an ACQ plus a non-stalling intr which is
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* another 2 words.
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*
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* Lastly the number of gpfifo entries per channel is fixed so at most
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* we can use 2/3rds of the gpfifo entries (1 pre-fence entry, one
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* userspace entry, and one post-fence entry). Thus the computation is:
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* We have two cases to consider: the first is we base the size of the
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* priv_cmd_buf on the gpfifo count. Here we multiply by a factor of
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* 2/3rds because only at most 2/3rds of the GPFIFO can be used for
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* sync commands:
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*
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* (gpfifo entry number * (2 / 3) * (8 + 10) * 4 bytes.
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* nr_gpfifos * (2 / 3) * (8 + 10) * 4 bytes
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*
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* If instead num_in_flight is specified then we will use that to size
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* the priv_cmd_buf. The worst case is two sync commands (one ACQ and
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* one INCR) per submit so we have a priv_cmd_buf size of:
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*
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* num_in_flight * (8 + 10) * 4 bytes
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*/
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size = num_in_flight * 18U * (u32)sizeof(u32);
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if (gpfifo_based) {
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